1、基于基于i386體系結(jié)構(gòu)的體系結(jié)構(gòu)的Linux啟動代碼分析啟動代碼分析xlanchen2006.6.1xlanchen2006.6.1Embedded Operating Systems2啟動代碼文件啟動代碼文件llinux/arch/i386/boot/bootsect.Sllinux/arch/i386/boot/setup.Sllinux/arch/i386/boot/compressed/head.Sllinux/arch/i386/kernel/head.Sllinux/arch/i386/kernel/init_task.cllinux/arch/init/main.cxlanch

2、en2006.6.1Embedded Operating Systems3實(shí)模式實(shí)模式l實(shí)模式是為了兼容早期的CPU而設(shè)置的l系統(tǒng)總是始于實(shí)模式l實(shí)模式下l地址總線：20位l內(nèi)存范圍：01MBl邏輯地址 = 段地址 + 段內(nèi)偏移l段地址 = 段寄存器中的值*16 （或左移4位）l段寄存器長度：16bitxlanchen2006.6.1Embedded Operating Systems4I386實(shí)模式下的內(nèi)存布局圖實(shí)模式下的內(nèi)存布局圖RAM1-MBROM-BIOSVIDEO-BIOSVRAM0 xA00000 xC00000 xF00000 x00000 xlanchen2006.6.1Emb

3、edded Operating Systems5軟盤和硬盤啟動軟盤和硬盤啟動l軟盤啟動，bootsect.Sl0 x7c000 x90000l0 x7c00, BIOSl0 x90000, lilol堆棧，0 x3ff4(0 x4000-12), 向下增長l磁盤參數(shù)表，12Bytes，0 x3ff40 x4000l顯示“Loading”lSetup0 x90200l系統(tǒng)l小內(nèi)核，0 x10000（64KB處），低裝載l大內(nèi)核，0 x100000（1MB處），高裝載lsetupl硬盤啟動，兩階段引導(dǎo)l裝載LILO（LInuxLOader）l第一個扇區(qū)ll裝載LINUXlBootsect.S0 x

4、90000lSetup.S0 x90200l系統(tǒng)0 x100000 x100000l跳轉(zhuǎn)到setupxlanchen2006.6.1Embedded Operating Systems6Setupl初始化硬件設(shè)備并為內(nèi)核程序的執(zhí)行建立環(huán)境l內(nèi)存檢測l鍵盤l視頻l磁盤控制器lIBM微通道總線MCAlPS/2設(shè)備（總線鼠標(biāo)）lAPM BIOSl若低裝載，將系統(tǒng)移動到0 x1000處（4KB處）否則，不必l臨時IDT和臨時GDTlFPUlPIC, 16個硬件中斷中斷向量3247l實(shí)模式保護(hù)模式lStartup_32xlanchen2006.6.1Embedded Operating Systems7

5、Compressed/head.SlStartup_32l初始化段寄存器和一個臨時堆棧l初始化BSS段l解壓縮l高裝載或低裝載解壓縮0 x100000（1MB）l跳轉(zhuǎn)到0 x100000處xlanchen2006.6.1Embedded Operating Systems8Head.SlStartup_32l初始化段寄存器l建立進(jìn)程0的內(nèi)核堆棧lSetup_idtl拷貝系統(tǒng)參數(shù)l識別處理器lGDT、IDTlStart_kernelxlanchen2006.6.1Embedded Operating Systems9The system-segment registerslIn protecte

6、d-mode the CPU needs quick access to some important data-structures, such as:lMemory-Segment DescriptorslInterrupt-Gate DescriptorslCall-Gate DescriptorslTask-State DescriptorslPage-Directory and Page-Table DescriptorslSpecial CPU registers locate these itemsxlanchen2006.6.1Embedded Operating System

7、s10GDT and IDTlTwo most vital system registers for protected-mode execution are:lGDTR (Global Descriptor Table Register)lIDTR (Interrupt Descriptor Table Register)l48-bits widebase-address + segment-limit (an array of descriptors, the GDT & the IDT)lSpecial instructionslSGDT/LGDT, SIDT/LIDTSegme

8、nt Base-AddressSegmentLimit4716 15016 bits32 bitsxlanchen2006.6.1Embedded Operating Systems11System Relationshipsdescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescriptordescrip

9、tordescriptorInterrupt Descriptor TableGlobal Descriptor TableGDTRIDTRxlanchen2006.6.1Embedded Operating Systems12LDT and TSSlFor protected-mode multitasking, the CPU needs to access two other data-structures:lThe current Local Descriptor Table (LDT)lThe current Task-State Segment (TSS)lAgain, speci

10、al registers tell the CPU where to find these data-structures in memory (assuming protected-mode is enabled)lInstructions:lSLDT/LLDT, STR/LTRxlanchen2006.6.1Embedded Operating Systems13Control RegisterslCR0lCR1lCR2lCR3xlanchen2006.6.1Embedded Operating Systems14CR0lCR0, MSW register (Machine Status

11、Word, 32-bit version) lContains system control flags that control operating mode and states of the processorlPE-bit (Protection Enabled)0 CPU is in real-mode, 1 CPU is in protected-modelInstruction: lmswlLINUX setup.S:l movw $1, %ax l lmsw %axl jmp flush_instr / why?lflush_instr: lTo turn on the PE-

12、bit (enables protected-mode),xlanchen2006.6.1Embedded Operating Systems15CR1、CR2、CR3lCR1lReservedlCR2lContains the page-fault linear address (the linear address that caused a page fault)lCR3lContains the physical address of the base of the page directory and two flags (PCD & PWT) xlanchen2006.6.

13、1Embedded Operating Systems16Segment Descriptor FormatBase31.24G DRSVAVLLimit19.16PDPLS XC/DR/WABase23.16Base15.0Limit15.03116150 xlanchen2006.6.1Embedded Operating Systems17“Hidden” part of Segment RegistersselectorSegment baseSegment limitAccessrightsThe programmer-visible part of a segment-regist

14、erThe “invisible” parts of a segment-registerindexTI RPL2 1 015Segment selectorxlanchen2006.6.1Embedded Operating Systems18Three VRAM zonesGRAPHICSMONOCHROME TEXTCOLOR TEXT64-KB32-KB32-KB0 xA00000 xB00000 xB8000 xlanchen2006.6.1Embedded Operating Systems19Array of picture-elementslText-mode VRAM is

15、organized as an arraylEach array-element occupies one word lWords LSB holds ascii character-codelWords MSB holds a color-number pair bgcolorfgcolorASCII character-code1512 118 70bytenybblenybblexlanchen2006.6.1Embedded Operating Systems20Color-Attribute ByteBlinkRGBIntenseGBRforeground color attribu

16、tebackground color attributexlanchen2006.6.1Embedded Operating Systems21Screen-element locations80 columns 25rowscharacters 0.79characters 80.159Video screencharacters 1920.1999xlanchen2006.6.1Embedded Operating Systems22l邏輯地址l段：偏移量l線性地址l32位無符號整數(shù)，04G-1, 即0 x000000000 xFFFFFFFFl物理地址l芯片級內(nèi)存單元尋址l地址轉(zhuǎn)換過程

17、內(nèi)存尋址內(nèi)存尋址物理地址線性地址分段單元分頁單元邏輯地址xlanchen2006.6.1Embedded Operating Systems23實(shí)模式？保護(hù)模式？分頁？實(shí)模式？保護(hù)模式？分頁？lReal modelExists mostly to maintain processor compatibility with older models, &lTo allow the OS to bootstrapxlanchen2006.6.1Embedded Operating Systems24段選擇子段選擇子indexTIRPL 2 1 015Segment selectorxlan

18、chen2006.6.1Embedded Operating Systems25_KERNEL_CSl_KERNEL_CS0 x10 = 0000 0000 0001 0000blIndex(0 x2), TI(0), RPL(0, highest)llimit(0 xFFFFF), base(0),lG(1, =4096), D(1,=32位),lP(1, in main memory), DPL(0, hignest), S(1),ltype(0 xA) lE(1), executable, codelC(0), not currentlR(1), readablelA(0), unacc

19、essedgdt: .word 0, 0, 0, 0 # dummy .word 0, 0, 0, 0 # unused .word 0 xFFFF # 4Gb .word 0 # base address = 0 .word 0 x9A00 # code read/exec.word 0 x00CF # granularity(4096).word 0 xFFFF # 4Gb .word 0 # base address = 0 .word 0 x9200 # data read/write .word 0 x00CF # granularity(4096)xlanchen2006.6.1Embedded Operating Systems26段描述符段描述符xlanchen2006.6.1Embedded Operating Systems27xlanchen2006.6.1Embedded Operating Systems2