英文資料翻譯Amodeling-basedmethodologyforevaluatingtheperformanceofareal-timeembeddedcontrolsystemKlemenPerko,RemyKocik,RedhaHamouche,AndrejTrostABSTRACTThispaperpresentsamodelling-basedmethodologyforembeddedcontrolsystem(ECS)design.Here,insteadofdevelopinganewmethodologyforECSdesign,weproposetoupgradeanexistingonebybridgingitwithamethodologyusedinotherareasofembeddedsystemsdesign.Wecreatedatransformationbridgebetweenthecontrol-schedulingandthehardware/software(HW/SW)co-designtools.Bydefiningthisbridge,weallowforanautomaticmodeltransformation.Asaresult,weobtainmoreaccuratetiming-behavioursimulations,consideringnotonlythereal-timesoftware,butalsothehardwarearchitecture’simpactonthecontrolperformance.Weshowanexamplewithdifferentmodel-evaluationresultscomparedtorealimplementationmeasurements,whichclearlydemonstratesthebenefitsofourapproach.?2021ElsevierB.V.AllrightsreservedKEYWORDS:Modeling,Modeltransformations,Embeddedcontrolsystemsdesign,Real-timesystems1.IntroductionEmbeddedcontrolsystems(ECSs)areubiquitousnowadays.Theyareusedinabroadspectrumofapplications,fromsimpletemperaturecontrolinhouseholdappliancestocomplexandsafety–criticalautomotivebrakesystemsoraircraftflightcontrolsystems.Differentapplicationshavedifferentdemandswithregardstothereal-timeexecution,controlperformance,energyconsumption,price,etc.,oftheECSbeingused.Moderntechnologiesforhardware(HW)andsoftware(SW)designprovideavarietyofpossibilitiesfordesigningECSs(e.g.,distributedandnetworkedHW,multi-processorsystems,avarietyofSWcontrolalgorithmsandreal-timeoperatingsystems(RTOSs),etc.)[1].ItiscommonlyacknowledgedthatthedesigningandverifyingofreliableandefficientECSsforaparticularapplicationarechallengingtasks.1.1.Traditionalcontrol-systemdesignTheaimofdesigninganECSistobuildacomputingsystemthatisabletocontrolthebehaviorofaphysicalsystem,e.g.,aplant.Suchaplantismadeupofinterconnectedmechanical,electricaland/orchemicalelements.AtypicalECSconsistsofelectronicsensorsfordataacquisitionfromtheplant,acomputingsystemforprocessingthecontrolalgorithm,andelectronicactuatorstodrivetheplant.TheECSdesignprocessinvolvesdifferentactorsandareasofexpertise(controltheory,signalprocessing,real-timeSWandHWengineers).Eachoftheseengineersisfamiliarwiththeirownmodelinglanguages,models,designtools,etc.Thisheterogeneityintroducescutsinthedesignprocess.Modeltransformationsareneededbetweeneachdesignstep;however,theyareoftencarriedoutmanuallyand,asaresult,arepronetomistakesandsubjecttointerpretation,whichofcoursedependsontheskillofthedesigner.ThetraditionalformofECSdesignisperformedintwoseparateddomains–thecontrolSWdomainandtheHWdomain–usingspecificdesigntoolsandtheirrespectivesystemmodels.Inthefirstdomain,controlengineersdefinethecontrollawsandtheSWengineerswritethecodethatexecutestheoperationsrequiredbythecontrollaws.Aso-calledcontrol-schedulingco-designisperformed.Decisionsmadeinthereal-time(RT)softwaredesignaffectthecontroldesign,andviceversa.Forinstance,differentSWschedulingpolicieshavedifferentimpactsonthelatencydistributionsinthecontrolloopsand,consequently,ontheirperformance.Also,thecontrol-loopperformancedirectlyaffects(byconstraining)theSWexecutionparameters(i.e.,samplingperiods,task-executionjitter,etc.).IntheseconddomaintheHWengineersdesignanHWplatformthatwillexecutethecontrolSW.Theconnectionsofallthesensorsandactuatorstotheplatformaremadeviatheavailablecommunicationchannels.However,becausetheHWplatformisdesignedseparately,controlengineerscannotestimateitsimpactonthecontrol-loopperformance.Forinstance,thedatafromsensorsandtoactuatorscanpassthroughoneormorecommunicationchannels.AHWengineercan,ingeneral,choosefromamongavarietyofcommunicationprotocols,andeachtypeintroducesdifferentlatenciesandjitter,whichthereforeaffectstheSWexecution.Thecontrolengineercannot,however,evaluatetheeffectoftheselatenciesbeforethesystemisactuallyimplemented.Hence,thedesiredperformanceofthesystemmaynotbeachieved,anditisnecessarytochangeandtunethecontrollaws(calibrationphase)inordertocompensatefortheimpactofthesecommunicationandexecutiondelays.Thefactthatthecalibrationhastobeperformedonanactualplantcanbeveryexpensiveandtime-consuming,especiallywhenthedesiredperformancecannotbeachievedusingthecurrentHWplatformandaredesignisrequired.AnothershortcomingoftraditionalECSdesignistheinabilityofcontrolandSWengineerstoexploitsomeoftheadvantagesofferedbymodernHWtechnologies.Forinstance,controlloopsrunninginparallel,insteadofthetraditionalsequentialexecution,couldgivebetterperformance.Parallelexecutioncanbeachievedwiththeuseofmulti-processorordistributedplatforms.ModernECSdesigntechniquesrelyheavilyonsystemmodeling,whichprovidesameanstoexaminehowvariouscomponentsworktogetherandtoestimatetheimpactoftheECS’simplementationoncontrolperformancebeforeitisactuallyimplemented.Thismakesitpossibletocorrecttheinitialcontrollawsinordertocompensatefortheimplementationimpactsearlyinthedesigncycle.Anotherimportantaspectofmodelingistheabilitytoexploredifferentpossiblesystemimplementations(design-spaceexploration).AppropriatemodelingcansignificantlyshortenthedesigncycleofanECS[2].Toovercometheproblemsintroducedbytheheterogeneityofdesignmodelsandtools,differentmethodologiesandtoolsweredeveloped[3].ThesemethodologiesusuallyprovideameanstocreateauniformECSmodel,simulateandevaluateitsbehavior,formallytransformittowardsanimplementation,etc.1.2.ProposedcontrolsystemdesignToimproveandacceleratethetraditionalECSdesignweproposethemergingoftheseseparateddomains.Onthebasisofthismerging,alltheactorsinthedesignprocesscouldbettercollaborateandexchangetheirdataduringthedesignprocess,theycoulddoamorethoroughdesign-spaceexplorationandthedesigncyclecouldbemadesignificantlyshorter.InsteadofdevelopinganewmethodologyforECSdesign,weproposetoupgradethetraditionalSW-basedcontrol-systemdesignapproachwithefficientmodelinganddesignoftheHWplatforms.Recently,severalmethodologieshavebeendevelopedthatconcernHW/SWco-design.ThesemethodologiesenabletheefficientdesignofSWandHWonembeddedsystemsintermsofSWexecutionspeed,HWresourcesusage,systemflexibility,futureupgradeability,finaldesigncosts,etc.Weproposecreatingaformalbridgebetweentheexistingtoolsforcontrol-schedulingco-designandHW/SWco-design.Thisbridgemakespossiblemodeltransformationsandtheexchangeofsimulationresultsbetweentoolsforcontrol-schedulingco-designandHW/SWco-design.Thebridgeisbasedonaformaltransformationofmodelsbetweendifferentdesigntools.Ourfoundationforthecontrolschedulingco-designmethodologyisworkpresentedin[4]anditsassociatedtool,MoDEST,whichispresentedin[5].ForthepurposeofHW/SWco-designwehaveselectedthemethodologypresentedin[6]withitsassociatedabstract-systemmodelingtool,ASyMod,whichispresentedin[7].Withthebridgeweareabletoobtainmoreaccuratecontrol-performanceevaluationsconsideringarchitecturaldetailsandeventhepossibilitytostudymixedHW/SWimplementationsofthecontrolsystem.Evaluatingtheimpactofimplementationintheearlydesignstagesreducesthenumberofdesign-lifecycleiterationsandshortensthetimeneededforafinalcalibrationofthecontrollaws.Inthenextsectionwepresenttherelatedmethodologies,followedbyshortdescriptionsoftheMoDESTandASyModtoolsandtheirmetamodels.InSection3wedescribetheformalrulesformodeltransformationandtheimplementationofthebridge.InSection4,twoexamplesofanembeddedcontrollerarepresented.Bycomparingsimulationresultstomeasurementsonarealimplementedsystem,weshowthebenefitsofourapproach.Finally,thepaperisconcludedinSection5.1.3.RelatedmethodologiesandtoolsTheincreasingneedtooptimizeECSsintermsoftheircontrolperformance,RTconstraintsandcostefficiencyhasledtolimitedcomputationalresourcescombinedwiththeirefficientexploitationandhas,asaconsequence,encouragedtheemergenceofnewresearchareas.Domain-specifictoolsforcontrol-schedulingco-designhavebeendevelopedrecently.Thesetoolssupportimplementationmodelingandanalysisintermsofcontrolperformance.SeveralofthetoolsarebasedonMatlab,whichistraditionallyusedbycontrolengineersforthedesignofcontrollaws.TheAIDA[8]toolsetisamodel-basedenvironmentforthedesignandanalysisofcontrolsystems,usedeitherinstand-aloneformorwithMatlab.Thetoolsetsupportsthemodelingofcontrol-functionexecutionondistributedHWcomponentscontainingmulti-processorsandcommunicationslinks.Theeffectsofthecontrolalgorithm’simplementationoncontrolperformancecanbeanalyzed.Jitterbug[9]isaMatlab-basedanalysistoolforcomputingaquadraticperformancecriterioninlinearcontrolsystemsundervarioustimingconditions.UsingJitterbug,thesensitivityofcontrolsystemstodelays,jitterandotherinterferencescanbestudied.TheeffectsofdifferentSWimplementationsoncontrolperformancecanbeanalyzed.TrueTime[10]isasimulatorinMatlab/Simulinkdesignedfortheco-simulationofthedistributedcontroller’staskexecutiononseveralRTkernels,networktransmissions,andcontinuousplantdynamics.ItprovidesacontrolperformanceanalysisofdistributedRTcomputer-basedcontrolsystems,consideringtheeffectsofprocessorsandnetworkscheduling,taskattributes,theirdatadependency,etc.TrueTimeandJitterbugcanbeusedtogethertoevaluatetheperformanceofvariouscontrolloopimplementations[11].RecentlyanESMol[12]toolchainhasbeendeveloped.Itincorporatesaprototypeschedulingtoolwhichcalculatesschedulesfortime-triggerednetworksindistributedembeddedsystems.TheESMoLcanbeusedtogetherwiththeTrueTimeinordertoassesplatformeffectstocomputedscheduleandtocontrolperformance.Theresearchactivitiesfocusedonsoftwaredesignfordistributedreal-timeembeddedsystemsleadtodevelopmentseveraltoolsandlanguages.TimingDefinitionLanguage(TDL)isahigh-leveldescriptionlanguageforspecifyingtheexplicittimingrequirementsofatime-triggeredapplication,whichmaybeconstructedoutofseveralcomponents.Itpromotestheideathatthefunctionalandtemporalbehaviorofdevelopedsoftwareshouldbeplatformindependent.Thisreducescostsofsystemintegration,validationandmaintenance.Anautomaticbus-schedulegenerationformessagesovernetworktopologyispresentedin[13].Anapproachtooptimizesoftwarecomponentallocationsystemsondistributedreal-timeembeddedsystemsisexplainedin[14].Authorsprovidebinpackingalgorithmfordeploymentandconfigurationofcomponentsinordertomeettheirrequiredquality-of-service(QoS)properties,suchaspredictablelatency/jitter,throughputguarantees,scalabilityetc.CheddartoolisdesignedforsoftwaretaskschedulingsimulationandfeasibilityanalysisofsystemsdescribedwithArchitectureAnalysis&DesignLanguage(AADL).MethodsforschedulinganalysisandmemoryrequirementsanalysisofbuffersusedforcommunicationbetweenAADLthreadsaredescribedin[15].ResearchershavedefinedseveralHW/SWco-designmethodologiesinordertoleveragesystemdevelopment.MulticomponentarchitecturesallowingRTimplementationsofcomplexalgorithmsatalowcosthavebeenproposed.Severaltoolshavebeenintroducedforsystemmodeling[16],synthesis[17]anddesign[18–20].PtolemyII[16]supportsavarietyofmodelsofcomputation,forexample,atimedmultitaskingmodel[21]foradeterministicdesignoftheconcurrentRTsoftware.Thetoolisabletomodelafixed-priorityschedulingoftaskswithconstantexecutiontimes.SynDEx[20]isaco-designtoolforrapidprototypingandoptimizingtheimplementationofdistributedRTembeddedapplicationsontomulticomponentarchitectures.Itincludesautomaticmappingandscheduling,supportsarchitecturerefinementsandtheautomaticgenerationoftheexecutablecode.Thecomplexityofthealgorithms,reusabilityandtraceability,demandareductioninthedesigncosts,andthediversityofskillsandtoolsinvolvedinthedesignprocesshasdrivenresearcherstodefineanewmodel-drivenmethodology.TheModel-DrivenEngineering(MDE)approachreliesonusingtheconceptsofmodelsasanabstractpresentationofthesystem.Themodelisalwaysconstructedwithaspecificpurposeinmindandisnotintendedtorepresentthesystemasawhole.Thesemanticsoftheconceptsandrelationshandledinthemodelhastobepreciselyspecified.Theroleofthemetamodelistodefinewhatthevalidmodelsexpress,e.g.,amodelisconformabletoametamodel.Metamodelsaredefinedusingoneofthemodelinglanguages.TheapproachwasfirstappliedintheSWengineeringdomain[22],butlaterithasalsobeenincreasinglyusedinthedesignofembeddedsystems[12,14,23,24].IntheMDEapproach,modelsevolvewithmodeltransformationsclassifiedintoverticalandhorizontaltransformations[25].Atypicalexampleofthehorizontaltransformationismodelmigration,andanexampleoftheverticaltransformationismodelrefinement.Verticaltransformationstepsaddmoredetailstothemodelwithrespecttothepreviousstep.Eachverticalrefinementstepleadstoamoredetailedmodel,whilestillimplyingthepropertiesoftheabstractmodelfromthefirststep.Thelevelofabstractionisloweredtowardstheimplementablemodel.Thehorizontaltransformationisatransformationwherethesourceandthetargetmodelsresideatthesameabstractionlevel,butthemodelcanmigratefromonetooltoanother.Withhorizontaltransformations,differentbridgesbetweenthetoolscanbeestablished.Forverticalandhorizontaltransformationsdifferentapproachesandrelatedlanguageshavebeendevelopedthatprovidetransformationenvironments.AcknowledgedrepresentativesofmodeltransformationlanguagesareATL[26,27]andGReAT[28,29].TransformationinGReATreliesongraphtransformationtechniques,whileinATLtransformationisbasedontextualwrittenrules.GReATisusedformodeltransformationsin[14].Detailedoverviewandcomparisonofmodeltransformationtoolsandapproachescanbefoundin[30].Ourworkisatthecrossroadsoftheaboveresearchareas.UsingtheMDEapproachbasedonmetamodelling,weofferadesignframeworkthatsupportsmodeltransformationssoastoenablelinksbetweendifferenttools,suchasthosementionedabove.Withinthetoolweprovideschedulingsimulationasin[15].Itprovidesanalysisofsoftwaretasksexecutiontimejittertocontrolperformance.AmodeltransformationbridgewithHW/SWco-designtoolextendsthisanalysistoconsideralsotheimpactofhardwarearchitecturecomponentsandalsoenablesarchitecturalexploration.2.Model-drivenembeddedsystemdesign2.1.MoDESTtoolTheModel-DrivenEmbeddedSystemDesignTool(MoDEST)tool[5]implementsthemethodologypresentedin[31].ItsmaingoalistounifytheECSdesignstepsintoahomogeneousapproach,byhandlingthecomplexityandtheheterogeneityofmodels,andtoimprovethemodel’sconsistencyandtractabilityalongthedesignstagein‘‘V-shaped’’ECSdesignprocessaspresentedinFig.1.TheMoDESTtooloffersadesignenvironmentrangingfromcontrol-algorithmmodelingtocodegenerationforamono-processortarget.Thetooldoesnotreplacespecializeddomaintools,butenablesthebuildingoflinksbetweentheminordertosupport,inthesameframework,thewholeembedded-systemdesignprocess.TheMoDESTtoolimplementsmulti-facetdesignviews,whereeachviewiswellsuitedtothejobandtheproblemsofeachdesignstep.Itprovidesadomain-orientedtoolsetforbuildingamodel,usingaspecificterminology(control,computer-scienceorRT),withthecorrespondingactor(controldesignerorRTsoftwaredesigner).Thesedomain-orientedlanguagesarebasedonaSW-componentapproach,effectivelyacceleratingthedesigncycle.Thecomponentapproachincreasesthereusabilityofmodels,despitetherapidtechnologicalevolutionofembeddedplatforms.Theembeddedcontrolsystemisdesignedonthebasisofthreefacets:functional,SWspecificationandimplementation.Inthefunctionalfacet,theuserdefinesthealgorithmusingadataflowgraph,wherethenodesarethefunctionsandthedatadependenciesarethesignals.IntheSWspecificationfacet,theuserspecifiesthesoftwarecomponents(IComps)thatwillimplementthenecessaryfunctions,forcomposingthecompletecontrolalgorithm.Intheimplementationfacet,accordingtotheRTconstraintsanddatadependencies,ICompsaregroupedintosequencesexecutedinperiodictasks.Inthisfacet,theusershouldalsogiveinformationabouttheHWresourcesandtheSWplatform,suchastheschedulingpolicy.TheModel-DrivenArchitecture(MDA)approachisused;thisraisestheembedded-systemdesignprocessfromaclassicalcode-orienteddevelopmenttoamodel-drivendevelopmentwithautomaticcodegeneration.Thetoolreliesonaproposedmetamodelabletocapturethethreefacetdescriptionsbydefiningaunifiedterminologyandsemanticstosharetheinformationwithouthavingtoduplicateit.Thus,itensuresconsistencybetweenthemodelsusedineachdesignstepbycarryingoutmodeltransformationsandreconciliationbetweenthefacets:eachchangeinthefacetdescriptionisautomaticallyrelayedtoanotherone.Thetoolprovidesfacilitiesforschedulinganalysisandsimulationaswellascodegenerationformultipletargets.ItincludesanRTbehavior-analysismoduletochecktheschedulingfeasibility(RateMonotonic(RM),DeadlineMonotonic(DM),EarliestDeadlineFirst(EDF),etc.).Itisalsoabletosimulateanddisplay,asachronogramchart,theexecutionoftasks.Thecode-generationandprofilingmodule,whichgeneratesthesourcecodesforthemultipleRTkernels(RTAI[32],DSPBios[33]andreal-timeJava)andcapturesarealtemporalexecutiontrace,hasalsobeenimplemented.TheMoDESTtoolalsoprovidesatiming-measuremodulethatperformslatency,delayandjittermeasurementsontaskexecution.Thistemporalinformationcanbeusedinhybridsimulationsinordertoestimatethelossofcontrolperformance.MetamodeloftheMoDESTimplementationfacetThebridgebetweentheMoDESTandASyModtoolsisbasedonrulesdefiningthetransformationsbetweenasubsetoftheMoDESTMetamodel(ImplementationFacetpart)andtheASyModMetamodel.Sincethegoalofthepaperistodescribethebridge,wewillnotpresentdetailsofthewholeMoDESTMetamodelbutonlyofthesubsetrelevanttotheimplementationfacet.Forthesakeofsimplicity,weshalltermittheMoDESTMetamodel.AsnippetofthemetamodelispresentedinFig.2.Todefinethemetamodel,weuseagraphnotation.Adata-flowgraph(DFG)isadirectedgraphthatrepresentsthedatadependenciesbetweenthenumbersofedgesrepresentthedatapaths.TheMulti-PeriodData-FlowGraph(MPDFG)isaDFGextendedwithinformationabouttheRTexecutionconstraintsofthedataoperations.AnMPDFGisatypeofdirectedacyclicgraph(DAG).IntheMoDESTtool,aMPDFGM(IC,C,TM,R)isusedtorepresenttheimplementationfacetofembeddedsystems,whereIC={IComp1,ICompN}isasetofimplementationcomponents(IComps),C={c1,cM}isasetofcommunicationsbetweentheimplementationcomponents,TM={tM1,tMO}isasetoftasksandRdefinesthetaskscheduler.ICompsrepresentthenodesintheMPDFGandcommunicationrepresentstheedgesbetweenthenodes.ICompisamathematicalfunctionthatcomputestheoutputsfromtheinputs.ICompcanbepresentedasatupleICompn({ok,...,ol},{io,...,ip}),where{ok,...,ol}isalistofallitsoutputsand{io,...,ip}isalistofallitsinputs.ThesetsIMandOMThesharedvariablesarerepresentedascommunication.CommunicationisadatatransferbetweentheoutputandtheinputoftwodistinctIComps.Acommunicationisnotedascn(ok,il,type),whereok?OMistheproducerofthedata,il?IMistheconsumerofthedataandtypedefinesthedatatype.Eachcommunicationcantransferonlyonedatatype,whichcanbechosenfromasetofpredefinedtypes(char,integer,float,double).ThetasksaddRTexecutionconstraintsforperiodicity,deadlinesandprioritiestoasetofIComps.TheexecutionoftasksinMoDESTistime-triggered,witheachtaskdefiningapartitionofIComps?IC.TaskcanbeexpressedasthequintupletMn(PMn,t0Mn,DMn,LMn,SeqMn),wherePMnisthetaskperiod,t0Mnisthestart-timeoffset,DMnisthetaskdeadline,LMnisthetaskpriorityandSeqMn={ICompq,...,ICompr}isanorderedsequencethatdefinestheexecutionsequenceofICompsthatshouldbeexecutedwhenthetaskiscalledataruntime.ThetaskschedulerisdefinedwiththepairR={SchM,PreM},whereSchMdefinestheschedulingalgorithmtypefromapredefinedsetofalgorithms{RM,DM,EDF}andthebooleanPreMdefineswhetherthetaskexecutionscanbepre-empted.2.2.ASyModtoolTheAbstractSystem-levelModelling(ASyMod)toolisarepresentativeoftheHW/SWco-designtools.Itisusedintheevaluationofembeddedsystemsduringtheearlystagesofthedesignprocessintermsoftheconsumptionofmaterialresources(memory,bus,processors,FPGA,etc.)andthedurationoftheRTtaskexecutions.ItprovidesauniformmodellingframeworkfortheHWandSWcomponentsdescribedatahighlevelofabstraction.ThemodellingfollowsrulesdefinedintheASyModmetamodel.TheASyModisconstructedofthreemajorparts.Thefirstpartisagraphicalmodellinginterface[7]basedonaGenericModellingEnvironment(GME)[34].GMEisaconfigurabletoolkitforcreatingdomain-specificmodellingandprogramsynthesisenvironments.InordertoconfiguretheGMEtoserveaspecificdomain,asuitablemetamodelfortheabstractHW/SWco-designisdefined.ThisspecificmetamodelisconformantwiththeGMEmetamodellinglanguage,calledMetaGME,andisbasedonUnifiedModellingLanguage(UML)classdiagramsandObjectConstraintLanguage(OCL)constraints.Adefinedmetamodelcontainsallthesyntactic,semantic,andpresentationinformationregardingtheASyModdomain–i.e.,whichHWandSWconceptscanbeusedtoconstructmodels,therelationshipsthatmayexistamongthoseconcepts,howtheconceptsmaybeorganizedandviewedbythemodeller,andtherulesgoverningtheconstructionofmodels[35].ThesecondpartofASyModisamodelinterpreterthatparsestheinformationfromthegraphicalmodelintoatextualdescription.Theobtaineddescriptioncomplieswiththesimulationkernel.ThiskernelisthethirdpartoftheASyModtool;itisbasedonamethodologypresentedin[6]andprovidesthemeansforthetemporalsimulationofdistributedsystemsonthesystemlevel.ThesimulationofthemodelprovidestemporalinformationabouttheSWtaskexecutions,theHWresourceusage,thecontentionsonthecommunicationdevicesandtheirimpactonthetaskexecutions.TheresultsaresummarizedinaHWresourceutilizationtableandstatisticalinformationabouttheexecutiontime(delays,jitter)foreachtask.Basedonthisi