1、通信系統仿真實驗 基于SystemView的2PSK系統仿真 1、 系統仿真的目的：1、了解通信系統的組成、工作原理、信號傳輸、變換過程。2、掌握通信系統的設計方法與參數設置原則。3、 掌握使用SystemView軟件仿真通信系統的方法。二、系統仿真任務：1、 系統輸入正弦波頻率：500 Hz；碼元傳輸速率：64kBd。2、設計一通信系統，并使用SystemView軟件進行仿真。3、獲取各點時域波形，波形、坐標、標題等要清楚；濾波器的單位沖擊相應和幅頻特性曲線。4、獲取主要信號的功率譜密度。5、各點波形：包括時域波形、眼圖、覆蓋圖、瀑布圖等。6、主要信號的功率譜密度。7、濾波器的單位沖擊響應及

2、幅頻特性曲線。3、 原理簡介：1、PCM編碼與解碼： 語音PCM的抽樣頻率為8kHz，每個量化樣值對應一個8位二進制碼，故話音數字編碼信號的速率為8bits*8kHz=64kb/s。通常我們采用的是脈沖代碼調制編碼，即PCM編碼。PCM通過抽樣、量化、編碼三個步驟將連續變化的模擬信號轉換為數字編碼。為了增大輸入信號的動態范圍，這里采用采用A律壓擴實現非均勻量化。2、并串和串并變換： ADC采樣之后得到的是8位并行信號，為了將其變換成串行信號，使用計數器和八選一數據選擇器來完成并行信號到串行信號的轉換。由于是8位8kHz采樣的并行信號，因此計數器的計數頻率為64kHz，才能在一個采樣周期內完成8

3、位傳輸。 而串行信號轉并行信號則是通過移位寄存器和鎖存器完成。移位寄存器將接收到的串行信號通過移位接收，移滿8位后將數據鎖存進入鎖存器中。移位寄存器和鎖存器的時鐘信號應設置為64kHz和8kHz。3、2PSK：(1)2PSK信號產生與調制 2PSK信號可以看作是雙極性基帶信號作用下的DSB調幅信號，因此在本系統中使用雙極性基帶信號與載波相乘再經過帶通濾波器得到2PSK信號。(2)2PSK信號的解調 2PSK只能采用相干解調，使用Cotas環提取出同步載波與2PSK信號相乘，經過一低通濾波器后再進行抽樣判決即可解調出基帶PCM編碼信號。4、 系統組成框圖、仿真模型、圖符參數設置：本系統由三部分組

4、成，分別是PCM編碼與解碼、并串和串并變換、2PSK調制與解調。系統組成框圖如下。數字頻帶傳輸信道2PSK 輸出正弦波PCM解碼DA輸出串/并變換并/串變換PCM編碼AD輸出輸入正弦波 1、PCM編碼與解碼圖幅參數 圖符號庫/名稱 參數0 Source: Sinusoid Amp = 1 v Freq = 500 Hz Phase = 0 deg Output 0 = Sine t1 t2 Output 1 = Cosine Max Rate (Port 0) = 1.92e+6 Hz2 Comm: Compander A-Law Max Input = ±5 Max Rate =

5、1.92e+6 Hz3 Logic: ADC Two's Complement Gate Delay = 0 sec Threshold = 500e-3 v True Output = 1 v False Output = 0 v No. Bits = 8 Min Input = -5 v Max Input = 5 v Rise Time = 0 sec Analog = t2 Output 0 Clock = t5 Output 0 Output 0 = Q-0 t6 Output 1 = Q-1 t6 Output 2 = Q-2 t6 Output 3 = Q-3 t6 Ou

6、tput 4 = Q-4 t6 Output 5 = Q-5 t6 Output 6 = Q-6 t6 Output 7 = Q-7 t6 Output 8 = Q-8 Output 9 = Q-9 Output 10 = Q-10 Output 11 = Q-11 Output 12 = Q-12 Output 13 = Q-13 Output 14 = Q-14 Output 15 = Q-15 Max Rate (Port 0) = 1.92e+6 Hz5 Source: Pulse Train Amp = 1 v Freq = 8e+3 Hz PulseW = 80e-6 sec Of

7、fset = -500e-3 v Phase = 0 deg Max Rate = 1.92e+6 Hz28 Logic: DACTwo's Complement Gate Delay = 0 sec Threshold = 500e-3 v No. Bits = 8 Min Output = -5 v Max Output = 5 v D-0 = t26 Output 7 D-1 = t26 Output 6 D-2 = t26 Output 5 D-3 = t26 Output 4 D-4 = t26 Output 3 D-5 = t26 Output 2 D-6 = t26 Ou

8、tput 1 D-7 = t26 Output 0 D-8 = None D-9 = None D-10 = None D-11 = None D-12 = None D-13 = None D-14 = None D-15 = None Max Rate = 1.92e+6 Hz31 Comm: DeCompand A-Law Max Input = ±5 Max Rate = 1.92e+6 Hz32Operator: Linear Sys Butterworth Lowpass IIR 3 Poles Fc = 3.4e+3 Hz Quant Bits = None Init

9、Cndtn = Transient DSP Mode Disabled Max Rate = 1.92e+6 Hz2、并串和串并變換 圖符號庫/名稱 參數6Logic: Mux-D-8Gate Delay = 0 sec Threshold = 500e-3 v True Output = 1 v False Output = -1 v Rise Time = 0 sec Fall Time = 0 sec S-0 = t7 Output 0 S-1 = t7 Output 1 S-2 = t7 Output 2 I-0 = t3 Output 0 I-1 = t3 Output 1 I-2

10、= t3 Output 2 I-3 = t3 Output 3 I-4 = t3 Output 4 I-5 = t3 Output 5 I-6 = t3 Output 6 I-7 = t3 Output 7 Enable* = t10 Output 0 Output 0 = Z t11 t13 Output 1 = Z* Max Rate (Port 0) = 1.92e+6 Hz7 Logic: Cntr-U/DGate Delay = 0 sec Threshold = 500e-3 v True Output = 1 v False Output = 0 v Rise Time = 0

11、sec Fall Time = 0 sec P-0 = None P-1 = None P-2 = None P-3 = None PL* = t8 Output 0 U*/D = None CE* = None Clock = t9 Output 0 Output 0 = Q-0 t6 Output 1 = Q-1 t6 Output 2 = Q-2 t6 Output 3 = Q-3 Output 4 = TC Output 5 = RC* Max Rate (Port 0) = 1.92e+6 Hz8Source: Step FctAmp = 1 v Start = 0 sec Offs

12、et = 0 v Max Rate = 1.92e+6 Hz9Source: Pulse TrainAmp = 1 v Freq = 64e+3 Hz PulseW = 2e-6 sec Offset = 0 v Phase = 0 deg Max Rate = 1.92e+6 Hz10Source: Step FctAmp = 0 v Start = 0 sec Offset = 0 v Max Rate = 1.92e+6 Hz23Source: Step FctAmp = 1 v Start = 0 sec Offset = 0 v Max Rate = 1.92e+6 Hz24Logi

13、c: Shft-8inGate Delay = 0 sec Threshold = 500e-3 v True Output = 1 v False Output = 0 v Rise Time = 0 sec Fall Time = 0 sec Input A = t22 Output 0 Input B = t22 Output 0 Clock = t25 Output 0 MR* = t23 Output 0 Output 0 = Q-0 t26 Output 1 = Q-1 t26 Output 2 = Q-2 t26 Output 3 = Q-3 t26 Output 4 = Q-4

14、 t26 Output 5 = Q-5 t26 Output 6 = Q-6 t26 Output 7 = Q-7 t26 Max Rate (Port 0) = 1.92e+6 Hz25Source: Pulse TrainAmp = 1 v Freq = 64e+3 Hz PulseW = 10e-6 sec Offset = -500e-3 v Phase = 0 deg Max Rate = 1.92e+6 Hz26Logic: Latch-8TGate Delay = 0 sec Threshold = 500e-3 v True Output = 1 v False Output

15、= 0 v Rise Time = 0 sec Fall Time = 0 sec Data D-0 = t24 Output 0 Data D-1 = t24 Output 1 Data D-2 = t24 Output 2 Data D-3 = t24 Output 3 Data D-4 = t24 Output 4 Data D-5 = t24 Output 5 Data D-6 = t24 Output 6 Data D-7 = t24 Output 7 L-Enable = t27 Output 0 Output 0 = Q-0 t28 Output 1 = Q-1 t28 Outp

16、ut 2 = Q-2 t28 Output 3 = Q-3 t28 Output 4 = Q-4 t28 Output 5 = Q-5 t28 Output 6 = Q-6 t28 Output 7 = Q-7 t28 Max Rate (Port 0) = 1.92e+6 Hz27Source: Pulse Train Amp = 1 v Freq = 8e+3 Hz PulseW = 4e-6 sec Offset = -500e-3 v Phase = 315 deg Max Rate = 1.92e+6 Hz3、2PSK調制與解調 圖符號庫/名稱 參數13Multiplier: Non

17、 Parametric Inputs from t14p0 t6p0 Outputs to 12 15 Max Rate = 1.92e+6 Hz14Source: SinusoidAmp = 1 v Freq = 192e+3 Hz Phase = 0 deg Output 0 = Sine t13 Output 1 = Cosine Max Rate (Port 0) = 1.92e+6 Hz15Operator: Linear SysLinear Phase Bandpass IIR 3 Poles Low Fc = 128e+3 Hz Hi Fc = 256e+3 Hz Quant B

18、its = None Init Cndtn = 0 DSP Mode Disabled Max Rate = 1.92e+6 Hz16 Comm: CostasVCO Freq = 192e+3 Hz VCO Phase = 0 deg Mod Gain = 1 Hz/v Loop Fltr = 1 + 1/s + 1/s2 Output 0 = Baseband InPhase Output 1 = Baseband Quadrature Output 2 = VCO InPhase Output 3 = VCO Quadrature t17 Max Rate (Port 3) = 1.92

19、e+6 Hz17Multiplier: Non ParametricInputs from t15p0 t16p3 Outputs to 18 Max Rate = 1.92e+6 Hz18Operator: Linear Sys Linear Phase Lowpass IIR 3 Poles Fc = 64e+3 Hz Quant Bits = None Init Cndtn = Transient DSP Mode Disabled Max Rate = 1.92e+6 Hz20Operator: Sampler Interpolating Rate = 64e+3 Hz Aperture = 0 sec Aperture Jitter = 0 sec Max Rate = 64e+3 Hz21Operator: Hold Last Value Gain = 1 Out Rate = 1.