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IPC/JEDEC-9704A

2012-January

PrintedCircuitAssemblyStrainGageTestGuideline

SupersedesIPC/JEDEC-9704A

June2005

AstandarddevelopedbyIPC

AssociationConnectingElectronicsIndustries

?

ThePrinciplesofStandardization

InMay1995theIPC’sTechnicalActivitiesExecutiveCommittee(TAEC)adoptedPrinciplesofStandardizationasaguidingprincipleofIPC’sstandardizationefforts.

StandardsShould:

ShowrelationshiptoDesignforManufacturability(DFM)andDesignfortheEnvironment(DFE)

Minimizetimetomarket

Containsimple(simplified)language

Justincludespecinformation

Focusonendproductperformance

Includeafeedbacksystemonuseandproblemsforfutureimprovement

StandardsShouldNot:

Inhibitinnovation

Increasetime-to-market

Keeppeopleout

Increasecycletime

Tellyouhowtomakesomething

Containanythingthatcannotbedefendedwithdata

Notice IPCStandardsandPublicationsaredesignedtoservethepublicinterestthrougheliminatingmis-understandingsbetweenmanufacturersandpurchasers,facilitatinginterchangeabilityandimprove-mentofproducts,andassistingthepurchaserinselectingandobtainingwithminimumdelaytheproperproductforhisparticularneed.ExistenceofsuchStandardsandPublicationsshallnotinanyrespectprecludeanymemberornonmemberofIPCfrommanufacturingorsellingproductsnotconformingtosuchStandardsandPublication,norshalltheexistenceofsuchStandardsandPublicationsprecludetheirvoluntaryusebythoseotherthanIPCmembers,whetherthestandardistobeusedeitherdomesticallyorinternationally.

RecommendedStandardsandPublicationsareadoptedbyIPCwithoutregardtowhethertheiradop-tionmayinvolvepatentsonarticles,materials,orprocesses.Bysuchaction,IPCdoesnotassumeanyliabilitytoanypatentowner,nordotheyassumeanyobligationwhatevertopartiesadoptingtheRecommendedStandardorPublication.Usersarealsowhollyresponsibleforprotectingthem-selvesagainstallclaimsofliabilitiesforpatentinfringement.

IPCPositionStatementonSpecificationRevisionChange

ItisthepositionofIPC’sTechnicalActivitiesExecutiveCommitteethattheuseandimplementationofIPCpublicationsisvoluntaryandispartofarelationshipenteredintobycustomerandsupplier.WhenanIPCpublicationisupdatedandanewrevisionispublished,itistheopinionoftheTAECthattheuseofthenewrevisionaspartofanexistingrelationshipisnotautomaticunlessrequiredbythecontract.TheTAECrecommendstheuseofthelatestrevision. AdoptedOctober6,1998

Whyisthereachargefor

thisdocument?

Yourpurchaseofthisdocumentcontributestotheongoingdevelopmentofnewandupdatedindustrystandardsandpublications.Standardsallowmanufacturers,customers,andsupplierstounderstandoneanotherbetter.Standardsallowmanufacturersgreaterefficiencieswhentheycansetuptheirprocessestomeetindustrystandards,allowingthemtooffertheircustomerslowercosts.

IPCspendshundredsofthousandsofdollarsannuallytosupportIPC’svolunteersinthestandardsandpublicationsdevelopmentprocess.Therearemanyroundsofdraftssentoutforreviewandthecommitteesspendhundredsofhoursinreviewanddevelopment.IPC’sstaffattendsandpar-ticipatesincommitteeactivities,typesetsandcirculatesdocumentdrafts,andfollowsallnecessaryprocedurestoqualifyforANSIapproval.

IPC’smembershipdueshavebeenkeptlowtoallowasmanycompaniesaspossibletoparticipate.Therefore,thestandardsandpublicationsrevenueisnecessarytocomplementduesrevenue.Thepricescheduleoffersa50%discounttoIPCmembers.IfyourcompanybuysIPCstandardsandpublications,whynottakeadvantageofthisandthemanyotherbenefitsofIPCmembershipaswell?FormoreinformationonmembershipinIPC,pleasevisit

orcall847/597-2872.

Thankyouforyourcontinuedsupport.

?Copyright2012.IPC,Bannockburn,Illinois,USA.AllrightsreservedunderbothinternationalandPan-Americancopyrightconventions.Anycopying,scanningorotherreproductionofthesematerialswithoutthepriorwrittenconsentofthecopyrightholderisstrictlyprohibitedandconstitutesinfringementundertheCopyrightLawoftheUnitedStates.

?

IPC/JEDEC-9704A

PrintedCircuitAssemblyStrainGageTestGuideline

DevelopedbytheJEDECReliabilityTestMethodsforPackagedDevicesCommittee(JC-14.1)andtheSMTAttachmentReliabilityTestMethodsTaskGroup(6-10d)oftheProductReliabilityCommittee(6-10)ofIPC

Supersedes:

IPC/JEDEC-9704-June2005

Usersofthispublicationareencouragedtoparticipateinthedevelopmentoffuturerevisions.

Contact:

IPC

3000LakesideDrive,Suite309SBannockburn,Illinois

60015-1219

Tel847615.7100

Fax847615.7105

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Acknowledgment

MembersoftheJEDECReliabilityTestMethodsforPackagedDevicesCommittee(JC-14.1)andtheSMTAttachmentReliabilityTestMethodsTaskGroup(6-10d)oftheIPCProductReliabilityCommittee(6-10)haveworkedtogethertodevelopthisdocument.Wewouldliketothankthemfortheirdedicationtothiseffort.Anydocumentinvolvingacomplextechnologydrawsmaterialfromavastnumberofsources.WhiletheprincipalmembersoftheSMTAttachmentReliabilityTestMethodsTaskGroupareshownbelow,itisnotpossibletoincludeallofthosewhoassistedintheevolutionofthisstandard.Toeachofthem,themembersofJEDECandIPCextendtheirgratitude.

ProductReliabilityCommittee

Chair

RezaGhaffarian,Ph.D.JetPropulsionLaboratory

TechnicalLiaisonsoftheIPCBoardofDirectors

DongkaiShangguanFlextronicsInternational

ShaneWhitesideTTMTechnologies

JEDECReliabilityTestMethodsforPackagedDevicesCommittee

Chair

JackMcCullenIntelCorporation

SMTAttachmentReliabilityTestMethodsTaskGroup

Chair

RezaGhaffarian,Ph.D.JetPropulsionLaboratory

SMTAttachmentReliabilityTestMethodsTaskGroup

NeilAdams,CircuitCheckInc.MudasirAhmad,CiscoSystemsInc.AileenAllen,Hewlett-Packard

Company

MichaelAzarian,UniversityofMaryland

AnuragBansal,CiscoSystemsInc.ElizabethBenedetto,Hewlett-Packard

Company

TrevorS.Bowers,AdtranInc.NicoleButel,AvagoTechnologiesBeverleyChristian,ResearchIn

MotionLimited

GlennDody,DodyConsultingHaroldEllison,QuantumCorporationDennisFritz,MacDermid,Inc.

PhilGeng,IntelCorporation

DavidD.Hillman,RockwellCollins

ChristopherHunt,NationalPhysicalLaboratory

AnnaLifton,CooksonElectronicsAnneLomonte,DraegerMedical

Systems,Inc.

RachelMatthews,VanguardEMS,Inc.

AlanMcAllister,IntelCorporationDavidNelson,RaytheonCompanyKeithNewman,Hewlett-Packard

Company

MichaelPaddack,BoeingCompanyDeepakPai,GeneralDynamicsInfo.

Sys.,Inc

SatishParupalli,IntelCorporationJohnH.Quick,IBMCorporationJagadeeshRadhakrishnan,Intel

Corporation

JohnM.Radman,TraceLaboratories-Denver

PaulReid,PWBInterconnectSolutionsInc.

RosaReinosa,Hewlett-PackardCompany

MartinScionti,RaytheonMissileSystems

RussellS.Shepherd,MicrotekLaboratories

JulieSilk,AgilentTechnologiesMarkTrahan,TexasInstrumentsInc.VasuVasudevan,IntelCorporationBillR.Vuono,RaytheonCompanyMelissaWarner,ItronInc.

AnthonyWong,NationalSemiconductorCorp.

iii

IPC/JEDEC-9704A

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TableofContents

SCOPE 1

Purpose 1

Background 1

TermsandDefinitions 3

AreaArrayComponent 3

Component 3

Interconnect 3

Non-AreaArrayComponent 3

DiagonalStrain(d) 3

Microstrain 3

PrincipalStrain(eP) 3

Rosette 3

PadCratering 3

StackedRosetteStrainGage 3

Strain 3

StrainGuidance 3

StrainMetric 3

Strain-Rate 3

StrainGage 3

StrainGageElement 4

RevisionLevelChanges 4

APPLICABLEDOCUMENTS 4

IPC(Normative) 4

ASTM(Informative) 4

OtherPublications(Informative) 4

GENERALREQUIREMENTS/GUIDELINES 4

Boards 6

ComponentsandDevices 8

AreaArrayComponents 8

Non-AreaArrayComponents 8

StrainGage 9

StrainGagePlacementofAreaArray

Components 10

StrainGagePlacementforNon-AreaArrayComponents 12

GageAttachment 12

LeadWires 13

MeasurementEquipment 14

MeasurementCalibration 14

ManualSimulation 14

StrainMetric 15

DATAANALYSISANDREPORTING 15

AnalysisRequirements 15

TestFrequency 16

StrainGageTestReportTemplate 16

Abstract 16

Introduction 16

TestApparatusandSetup 16

Results 16

CONCLUSIONS 17

FUTURESTUDIES 17

APPENDIXA ICTDESIGNCONSIDERATIONS 18

APPENDIXB ACRONYMS 21

Figures

Figure1-1 ExamplesofSolderJointDamage(top:padcratering,bottomleft:bulksolderjointfailure,bottomright:solderinterfacialfracture) 2

Figure1-2 AreaArrayComponent 3

Figure1-3 Diagonalstrainmetricisthemaximumofe2ore4,whicheverstrainisgreateralongthese

twodirections,relativetothecomponent. 3

Figure3-1 ExampleBoardAssemblyProcessStepsforStrainMeasurement 5

Figure3-2 ExampleSystemAssemblyProcessSteps

forStrainMeasurement 5

Figure3-3 PCAwithSMTComponentsOnly(AfterSMTReflow) 6

Figure3-4 PCAwithBothSMTandThrough-HoleComponents(AfterWaveSolder) 7

Figure3-5 ICTFixtureStrainGageTestSetup 7

Figure3-6 StackedRosetteStrainGage 9

Figure3-7 StrainGageDimensions(Inches) 9

Figure3-8 RecommendedGagePlacementforBGAComponents 10

Figure3-9 InterferenceDuetoBGAPushdownBlock 11

Figure3-10 InterferenceDuetoICTProbe 11

Figure3-11 CentroidofGagePlacementAboveCorner

LandPad 12

Figure3-12 ComponentRemovaltoFacilitateGagePlacement 12

Figure3-13 Uni-AxialStrainGagePlacementforMLCCpackages(within1.0mmofsolderfillets) 12

Figure3-14 LeadWireRoutingExample 13

Figure3-15 ExampleGageCorrelationTool 14

Figure4-1 TimeHistoryoftheStrainLimitCriteria 15

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FigureA-1 IllustrationofSupport‘‘skate’’whenaUUT’sSupportisOverloadedwith

UpwardPressure,CausingittoCollide

withaComponent. 18

FigureA-2 IllustrationofUUTSupportAreas

andKeep-outAreasarounda

BGAcomponent 19

FigureA-3 IllustrationofComponenttoSupportClearanceandProperSupport

Alignment 20

Tables

Table4-1 ExampleStrainReportforaStrainGagedComponentthatwentthroughVarious

HandlingandAssemblyProcesses 17

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PrintedCircuitAssemblyStrainGageTestGuideline

SCOPE

ThisdocumentismeanttobeusedasamethodologyforstraingageplacementandsubsequenttestingofPrintedCircuitAssemblies(PCAs)usingstraingages.ThemethoddescribesspecificguidelinesforstraingagetestingofPCAsduringtheprintedboardmanufacturingprocess,includingassembly,test,systemintegration,andothertypesofoperationsthatmayinduceboardflexure.

Thesuggestedprocedureenablesprintedboardassemblerstoconductstraingagetestingindependently,andprovidesaquantitativemethodformeasuringboardflexure,andassessingrisklevels.

Thetopicscoveredinclude:

Testsetupandequipmentrequirements

Strainmeasurement

Reportformat

ThisdocumentassumesthemethodologyisbeingusedtotestasurfacemountdevicesuchasBallGridArray(BGA),SmallOutlinePackage(SOP),ChipScale(Size)Package(CSP),andarea-arraysurfacemount(SMT)connectors/sockets.Incertaincases,thedescribedtestapproachmaybeusedfornon-area-arraydiscrete(SMT)devicessuchascapacitorsorresistors.

PurposeStraingagetestingallowsobjectiveanalysisofthestrainandstrainratelevelstowhichasurfacemountcomponentmaybesubjectedduringPCAassembly,test,andoperation.

Characterizationofworst-casePCAstrainiscriticalduetothesusceptibilityofcomponentinterconnectstostrain-inducedfailures.Excessivestraincanresultinvariousfailuremodesfordifferentsolderalloys,packagetypes,surfacefinishes,orlaminatematerials.Suchfailuresincludesolderballcracking,tracedamage,laminaterelatedadhesivefailure(padlifting)orcohesivefailure(padcratering)andpackagesubstratecracking(seeFigure1-1).

BackgroundBoardflexurecontrolusingstraingagemeasurementhasprovenbeneficialtotheelectronicsindustry,andcontinuestogainacceptanceasamethodtoidentifyandimprovemanufacturingoperationsthatcanposeahighriskforinterconnectdamage.However,withtherapidtransitiontolead-freeassemblytechnology,increasedinterconnectdensi-ties,andnewlaminatematerials,thepotentialforflexure-induceddamagehasincreased.Manyboardassemblersarenowrequiredtooperateunderstrainlevelsspecifiedbytheircustomersorcomponentsuppliers.

Asstrainmeasurementtechnologyhasmatured,differentmethodologieshavedeveloped.Variationsinstraingagemethod-ologyinhibitreliabledatacollectionandpreventdatacomparisonacrosstheindustry.Thisdocumentprovidesastandard-izedsetofguidelinestoaddressvariationsingagemounting,gageplacement,experimentdesign,dataacquisitionsystemvariables,andstrainmetrics.

PCAstrainmeasurementincludesapplicationofstraingagestotheprintedboardnearspecifiedcomponents,followedbysubjectingtheinstrumentedboardtovarioustest,assembly,andhandlingoperations.Stepswhichexceedstrainlimitsaredeemedexcessiveandareidentifiedsothatcorrectiveactionscanbemade.Strainlimitsmaycomefromthecustomer,com-ponentsupplierorinternalbestknownpractices.Examplesofstrainmeasurementcriteriaareshowninthe

/

IPC-WP-011whitepaper.

Byidentifyingareassensitivetomanufacturingvariation,straingagetestingprovidesinsightintotheeffectsofaproduc-tionramp.Straingagemeasurementsbecomethebaselineforfutureprocessimprovementactivities,andquantifytheeffec-tivenessofadjustments.Manufacturingstepsthataretypicallycharacterizedarelistedbelow:

SMTassemblyprocess:

Printedboarddepanelizationprocesses

Allmanualhandlingprocesses

Allreworkandretouchprocesses

Connectorinstallation

Componentinstallation

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SolderBall

IPC-9704a-1-01

Figure1-1ExamplesofSolderJointDamage(top:padcratering,bottomleft:bulksolderjointfailure,bottomright:solderinterfacialfracture)

Printedboardtestprocesses:

In-CircuitTest(ICT),orequivalent‘‘shortsandopens’’typetest

BoardFunctionalTest(BFT),orequivalentfunctionaltest

Mechanicalassembly:

Heatsinkassembly

Printedboardsupport/stiffenerassembly

Systemboardintegration,orsystemassembly

PeripheralComponentInterconnect(PCI)ordaughtercardinstallation

DualIn-lineMemoryModule(DIMM)installation

ShippingandHandling

Assemblyprocessesfordifferentprintedboardsandassemblersvary.TestssuchasICTandBFTarereferredtogenericallyinthisdocument;nomenclaturecanvaryatdifferentmanufacturingsites.Insuchcases,applythesamerequirementstotheequivalenttestprocesses.However,thegoalistocharacterizeallassemblystepsinvolvingmechanicalloading.Donotcon-straintestingtothestepslistedabove,oronlytoperceivedhighriskareas.Thedatafromthesetestscanserveasabase-lineforfuturereference.

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TermsandDefinitionsThedefinitionofalltermsusedhereinshallbeinaccordancewithIPC-T-50andasdefinedbelow.

IPC-9704a-1-02

AreaArrayComponentAcomponentthathasterminationsarrangedinagridonthebottomofthepackageandcontainedwithinthecomponentoutline(SeeFigure1-2).

ComponentAnydeviceormechanicalinterconnectstructurewhichisaffixedtotheprintedcircuitboard.

InterconnectConductiveelementusedforelectricalinterconnec-tion,e.g.,solderball,lead,etc.

Non-AreaArrayComponentAcomponentthathasterminationsarrangedaroundtheperipheryofthepackageineitheraleadedorleadlessconfiguration.Thisincludescomponentswithend-capterminationssuchaschipcapacitorsorresistors.

DiagonalStrain(d)Thedirectionalstrainalignedwithe2ofthestraingageororthogonaltothisdirection,e4(wheree4=e1+e3-e2)whicheverisgreater:

Figure1-2AreaArrayComponent

d=Max(|e2|,|e1+e3-e2|)

e4

e1

e

2

e3

e4

IPC-9704a-1-03

asshowninFigure1-3

MicrostrainDimensionlessunit,106x(changeinlength)÷(originallength).

PrincipalStrain(eP)Themaximumandminimumnormalstrainsinaplane,alwaysperpendiculartoeachotherandorientedindirectionsforwhichtheshearstrainsarezero.

eee

p

1 3

2

±eeee

1

2

1

2

2

2

3

2

RosetteStraingagecontainingtwoormoreindependentgridsformakingmeasurementsofstrainalongeachoftheiraxesaboutacommonpoint.

tothecomponent.

PadCrateringTheformationofacohesivedielectriccrackorfrac-tureunderneaththepadofasurfacemountcomponent.

Figure1-3Diagonalstrainmetricisthe

maximumofe2ore4,whicheverstrainis

greateralongthesetwodirections,relative

StackedRosetteStrainGageStraingagerosetteconstructedofgridsstackedoneabovetheotheraboutacom-monpoint.

StrainDimensionlessunit,(changeinlength)÷(originallength).

StrainGuidanceThelimitforthemagnitudeofachosenstrainmetric.

StrainMetricThedefinedstrainparameterselectedasacriticalmeasurementcriterion.Diagonalstrainandprin-cipalstrainaretwopossiblestrainmetrics.

Strain-RateChangeinstraindividedbythetimeintervalduringwhichthischangeismeasured.

StrainGagePlanarmetallicfoilpatternthatisadheredtoanunderlyingsurfaceandexhibitsachangeinresistancewhensubjectedtoastrain.

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StrainGageElementSensingareaofstraingagedefinedbytheserpentinemetallicgridpattern.

RevisionLevelChangesChangesthatwereincorporatedintothecurrentrevisionofthisstandardareindicatedthroughoutbygrayshadingoftherelevantsubsection(s).Changestoafigureortableareindicatedbygrayshadingofthefigurecaptionortableheader.Thefollowingsectionshavebeenremovedfromthisdocumentrevision:

1.4,FutureStudies

3.8,ManualSimulation,paragraphs8and9referringtooptionalrecommendationsforsimulatingin-processhandling.

3.9,ShippingPackageTest(nowcoveredinIPC-9703).

AppendixA(StrainLimits)andappendixB(ReferenceforRateLimitedGuidance),bothofwhichhavebeentransferredtotheIPC-WP-011whitepaperforrevision

(/IPC-WP-01

1

).

APPLICABLEDOCUMENTS

Thefollowingnormativedocumentsareapplicableandconstituteapartofthisspecificationtotheextentspecifiedherein.Subsequentissuesof,oramendmentsto,thesedocumentswillbecomeapartofthisspecification.Informativedocumentslistedbelowareforreferenceonly.DocumentsaregroupedundercategoriesasIPC,JointElectronDeviceEngineeringCouncil(JEDEC),AmericanSocietyforTestingandMaterials(ASTM)andothersdependingonthesource.

IPC(Normative)1

IPC-T-50TermsandDefinitionsforInterconnectingandPackagingElectronicCircuits

IPC-D-279DesignGuidelinesforReliableSurfaceMountTechnologyPrintedBoardAssemblies

IPC-7095DesignandAssemblyProcessImplementationforBGAs

IPC-9701PerformanceTestMethodsandQualificationRequirementsforSurfaceMountSolderAttachments

IPC/JEDEC-9702MonotonicBendCharacterizationofBoard-LevelInterconnects

IPC/JEDEC-9703MechanicalShockTestGuidelinesforSolderJointReliability

IPC/JEDEC-9707SphericalBendTestMethodforCharacterizationofBoardLevelInterconnects

IPC-9708TestMethodsforCharacterizationofPrintedBoardAssemblyPadCratering

ASTM(Informative)2

ASTME1561-93(Reaffirmed2003)StandardPracticesforAnalysisofStrainGageRosetteData

OtherPublications(Informative)

CodeofPractice,forinstallationofelectricalresistancestraingauges,BritishSocietyofStrainMeasurement3

IPC-WP-011GuidanceforStrainGageLimitsforPrintedCircuitAssemblies4

GENERALREQUIREMENTS/GUIDELINES

Figure3-1andFigure3-2illustrateexamplesofprocessstepswherestraingagemeasurementsarerecommended.Figure3-1showsthestepsforprintedcircuitassemblyandFigure3-2forsystemassembly.

ExamplemanufacturingassemblyandteststepswherestrainmeasurementsshouldtypicallybetakenaredepictedbythestrainmeasurementiconinFigure3-1andFigure3-2.Multipleiterationsoractuationsofeachprocessstepcanhelpchar-acterizetheassociatedprocessvariance.Thiscanalsoprovideinsightintosituationswherethereiscomplexbending.

/IPC-WP-011

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Example

Example

=StrainMeasurement

WaveSolder

Post-SMT

ICT#1

DIMMsetc.

BoardAssembly

ICT#2

CPU

CPU

HS

HS

HS

MEM

MEM

HS

Packaging

FunctionalTestDisassembly

FunctionalTest

Functional

Preparation

Test

ComponentHardwareAssembly

IPC-9704a-3-01

Figure3-1 BoardAssemblyProcessStepsforStrainMeasurement

CPU

HS

MEM

MEM

SystemBoardAssembly

=StrainMeasurement

MEM

PC

PC

Packaging

SystemAssembly

IPC-9704a-3-02

Figure3-2 SystemAssemblyProcessStepsforStrainMeasurement

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BoardsDuetothelimitedmechanicalstrainappliedpriortoSMTreflow,andmoreimportantlybecausesolderjointsareformedonlyafterreflow,straincharacterizationisrequiredonlyforoperationsfollowingSMTreflow.

Typically,aminimumoftwotestboardsareinstrumented.Theyarenotrequiredtobeelectricallyfunctionalbutmustmechanicallyrepresentthelatestdesign.Ataminimum,evaluatethefollowingtwoboardtypes:

PrintedboardswithSMTcomponentsonly(afterSMTreflow)

PrintedboardswithbothSMTandthrough-holecomponents(afterwavesolder)

Thesearetheminimumrequirements.Characterizationofthesystemassemblyprocessmightrequireadditionaltestboards.Ifadeviceundertestisstrainedtoapointwheredamagemayhaveoccurred,thesystemshouldbeevaluatedtoensurethataccuratedatacanstillbeassessedusingthistestboard.

Thefirstinstrumentedprintedboardshouldreflectaprintedcircuitassembly(PCA)thathasbeenthroughSMTreflow,justpriortowavesolder.AnexampleisshowninFigure3-3.Atthisstage,theboardcontainsonlySMTcomponents.AscanbeseeninFigure3-3,appropriatewiremanagementisimportantfortheseboards.Bundlingandsecuringthewireswithheatresistanttapeortiesisimportantwhenpreparingtheseboards.Thewiresshouldberunbetweencomponents,wheretheywillnotinterferewithanyprocesssteps.

Theobjectiveatthisstageistocharacterizethestrain/strainrateduringmanualhandling,insertion/removalofconnectorsandotherthrough-holecomponents,andanyelectricaltestingconductedpriortowavesolder.Thisprintedboardshouldnotbeusedforthecharacterizationofassemblystepsafterwavesolder.

9704a-3-03

Wiresbundledandsecured

Examplegagelocation

Figure3-3PCAwithSMTComponentsOnly(AfterSMTReflow)

ThesecondinstrumentedprintedboardshouldbesimilartoPCAsthathavecompletedwavesolder.AnexampleisshowninFigure3-4.Aswiththepreviousboard(Figure3-3),appropriatewiremanagementpracticesshouldbefollowed.ThisprintedboardcontainsallSMTandthrough-holecomponentsandisusedtocharacterizeallassemblystepsafterfinalreflowincluding(whereapplicable):

Depanelization/routing

Boardsupport/stiffenerassembly

Finalsystemassembly

PCIcardinsertion/removal

DIMMmoduleinsertion/removal

Daughtercardinsertion/removal

Heatsinkattachment

Testoperations(ICT,BFT)

BGAandthrough-holecomponentrework

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9704a-3-04

Examplegagelocation

Wiresbundledandsecured

Figure3-4PCAwithBothSMTandThrough-HoleComponents(AfterWaveSolder)

AlthoughICTandBFTaretypicalhighstrain/strainrateoperations,damageispossibleinanyotherstep.AtypicalICTstraingagetestsetupisillustratedinFigure3-5.

9705a-3-05

Wiresbundledandsecuredawayfromhold-downposts

Figure3-5ICTFixtureStrainGageTestSetup

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Allassemblystepsshouldbecharacterized.Attentionshouldalsobepaidtoprocesseswheremechanicalfixturesareused,e.g.,supportfixtures,pressfitfixtures,thumbscrewfixtures,etc.Whereracksortraysareused,processstepssuchasstor-ageandboardtransfer,shouldalsobeconsidered.

Itisstronglyrecommendedthatanymanualhandlingbetweenassemblysteps,withorwithoutfixtures,becharacterized.Ifthemanualhandlingstepsaresimilar,combiningthehandlingtestintoonetestrun,representativeofworst-casehandling,isacceptable.Detailsofthismanualhandlingsimulationmustbedocumentedinthetestreport.

Simulationsshouldalsobeconductedtoquantifytheassociatedvariability.Theremaybeuniquemanufacturingprocessesthatrequirealternativeconfigurations.Forexample,through-holecomponentstypicallyrequirewavesolder.Wavesolderconventionallyfollowsconvectionreflow(oneortwopassesdependingonboardlayout).However,aPCAcouldhaveinductorcoilsmanuallyinsertedbeforeSMTreflowandnotrequirewavesolder.Incaseswhereassemblycharacterizationpriortowavesolderisrequired,thetestboardshallbemechanicallyrepresentativeofboardspriortoSMTreflow.

Insuchinstances,alternativeset-upsareacceptableaslongasallmechanicalloadingcharacterizationrequirementsaremet.Thefollowingcomponentsmustbealsopresentontheprintedboard:

Componentsoflargephysicalsizeand/ormass

Componentswhichmechanicallyconstraintheprintedboard,e.g.,busbars,longconnectors,etc.

Itisrecommendedthattestboardsbeinspectedforexcessivewarpagepriortoinstrumentation.Anotherpossibleconsider-ationwouldbetheeffec

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