第四章：離子注入技術(shù)CMOSStructurewithDopedRegionsn-channelTransistorp-channelTransistorLIoxidep–epitaxiallayerp+siliconsubstrateSTISTISTIn+p+p-welln-wellp+p–p+p–p+n+n–n+n–n+ABCEFDGHKLIJMNOn+nn++p+pp++4.1.離子注入原理4.1.1.物理原理(P.101-110) 通過改變高能離子的能量，控制注入離子在靶材料中的位置。

a) Lowdopantconcentration(n–,p–)andshallowjunction(xj)MaskMaskSiliconsubstratexjLowenergyLowdoseFastscanspeedBeamscanDopantionsIonimplanterb) Highdopantconcentration(n+,p+)anddeepjunction(xj)BeamscanHighenergyHighdoseSlowscanspeedMaskMaskSiliconsubstratexjIonimplanter重離子在材料中與靶原子的碰撞是“彈性”庫侖散射級聯(lián)散射EnergyLossofanImplantedDopantAtomSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiSiX-raysElectroniccollisionAtomiccollisionDisplacedSiatomEnergeticdopantionSiliconcrystallatticeFigure17.9

能量損失： 散射路徑R，靶材料密度

，阻止本領(lǐng)S能量損失(P.106~107)注入離子的分布N（x）（無電子散射） 注入劑量

0（atom/cm-2），射程：Rp

標準偏差Rp

ScanningdiskwithwafersScanningdirectionFaradaycupSuppressorapertureCurrentintegratorSamplingslitindiskIonbeam

對于無定型材料，有： 為高斯分布 平均射程Page107多能量、多劑量注入4.1.2.設備AnalyzingMagnetGraphiteIonsourceAnalyzingmagnetIonbeamExtractionassemblyLighterionsHeavyionsNeutralsFigure17.14

4.2.溝道效應和盧瑟福背散射

6.2.1.溝道效應溝道峰溝道效應的消除(臨界角）4.2.2.盧瑟福背散射RBS-C作用？P。112，。。。4.3.注入離子的激活與輻照損傷的消除

P.112~116 1）注入離子未處于替位位置 2）晶格原子被撞離格點 Ea為原子的位移閾能大劑量——非晶化臨界劑量AnnealingofSiliconCrystalRepairedSilatticestructureandactivateddopant-siliconbondsb)Silatticeafterannealinga)DamagedSilatticeduringimplantIonBeamFigure17.27

熱退火：1）激活率(成活率)（%）

Si：P、B100%，As50%2）臨界通量

C(cm-2)(Fig5.13)3）退火后的雜質(zhì)再分布4）退火方式：“慢退火”，快速熱退火 分步退火5）退火完成的指標：電阻率、遷移率、少子壽命4.4.離子注入工藝中的一些問題 1。離子源：汽化高壓電離 多價問題 分子態(tài)—原子態(tài)問題 （產(chǎn)額問題）

2。選擇性摻雜的掩膜 SiO2、Si3N4、光刻膠、各種金屬膜P離子注入SiSiO2Si3N4E(keV)Rp(m)

Rp(m)Rp(m)

Rp(m)Rp(m)

Rp(m)100.0140.0070.0110.0050.0080.004200.0250.0120.0200.0080.0150.006500.0610.0250.0490.0190.0380.0141000.1240.0460.1000.0330.0770.026 有掩膜時的注入雜質(zhì)分布？ControllingDopantConcentrationandDeptha) Lowdopantconcentration(n–,p–)andshallowjunction(xj)MaskMaskSiliconsubstratexjLowenergyLowdoseFastscanspeedBeamscanDopantionsIonimplanterb) Highdopantconcentration(n+,p+)anddeepjunction(xj)BeamscanHighenergyHighdoseSlowscanspeedMaskMaskSiliconsubstratexjIonimplanterFigure17.5

3。遮擋(注入陰影效應ImplantShadowing)（P119）

4.硅片充電Resista)MechanicalscanningwithnotiltIonbeamb)ElectrostaticscanningwithnormaltiltResistIonbeamElectronShowerforWaferChargingControlAdaptedfromEatonNV10ionimplanter,circa1983++++++++++++++++++++++++++++++++++++++++++Ionbeam-BiasedapertureElectrongunSecondaryelectrontargetSecondaryelectrons+Ion-electronrecombinationWaferFigure17.23

一次電子(幾百eV)二次電子(20eV)不能有高能電子!PlasmaFloodtoControlWaferCharging-BiasedapertureIonbeamNeutralizedatomsWaferscandirectionCurrent(dose)monitorPlasmaelectronfloodchamberArgongasinletElectronemissionChamberwall+++++++++++++++++++++++++SNSN++++++++ArArAr高能4.5.離子注入工藝的應用 1。摻雜2。淺結(jié)形成（ShallowJunctionFormation,p116)3。埋層介質(zhì)膜的形成(page116)

如：注氧隔離工藝（SIMOX）

（SeparationbyImplantedOxygen)4。吸雜工藝 如：等離子體注入（PIII）吸雜工藝 （PlasmaImmersionIonImplantation）5。SmartCutforSOI6。聚焦離子束技術(shù)7。其它（如：離子束表面處理） BuriedImplantedLayern-wellp-wellp-

Epilayerp+Siliconsubstratep+BuriedlayerRetrogradewells埋層注入，替代埋層擴散和外延RetrogradeWelln-wellp-wellp+Buriedlayerp+Siliconsubstraten-typedopantp-typedopantp++n++PunchthroughStopn-wellp-wellp+Buriedlayerp+Siliconsubstraten-typedopantp-typedopantp+p++n+n++ImplantforThresholdVoltageAdjustmentn-wellp-wellp+Buriedlayerp+Siliconsubstraten-typedopantp-typedopantp+p++pn+n++n閾值電壓調(diào)整Source-DrainFormations++++++++----------++++++++++++++++----------------n-wellp-wellp+Buriedlayerp+Siliconsubstratep+S/Dimplantn+S/DimplantSpaceroxideDrainSourceDrainSourceb) p+andn+Source/drainimplants (performedintwoseparateoperations)++++++++----------n-wellp-wellp+Buriedlayerp+Siliconsubstratep-channeltransistorp–LDDimplantn-channeltransistorn–LDDimplantDrainSourceDrainSourcePolygatea) p–

and

n–

lightly-dopeddrainimplants (performedintwoseparateoperations)DopantImplantonVerticalSidewallsofTrenchCapacitor n+dopantn+p+TiltedimplantTrenchforformingcapacitor溝槽電容器（取代DRAM的平面存儲電容）的側(cè)壁摻雜Ultra-ShallowJunctions180nm20?gateoxide54nmarsenicimplantedlayerPolygateCMOSTransistorswithandwithoutSIMOXBuriedOxideLayera)CommonCMOSwaferconstructionn-wellp-wellEpilayerSiliconsubstrateb)CMOSwaferwithSIMOXburiedlayern-wellp-wellImplantedsilicondioxideSilicon