1組合邏輯部分小結(jié)第4章組合邏輯設(shè)計原理第6章組合邏輯設(shè)計實踐2第4章基本原理

開關(guān)代數(shù)基礎(chǔ)組合邏輯的基本分析、綜合方法冒險

開關(guān)代數(shù)的公理、定理對偶、反演規(guī)則邏輯函數(shù)的表示法

分析步驟，利用公式進行化簡設(shè)計方法、步驟利用卡諾圖化簡，電路處理無關(guān)項的化簡——

冒險的檢查和消除3Switchingalgebraex1：prove(AB+A’C)’=AB’+A’C’4.47(a)Yes (b)No(c)Yesself-duallogicfunction:F=FDYesorNo?4Truthtable、canonicalsum、canonicalproduct、KarnaughmapLogicfunctiontruthtableStandardRepresentationoflogicfunction4.7(h)4.9(e)canonicalsum、canonicalproduct5Mintermandmaxtermex1:四個變量可以構(gòu)成()個最小項，它們之和是()。最小項m5和m10相與的結(jié)果為（）。StandardRepresentationoflogicfunctionex2:Forasamelogicfunction,accordingtotherelationshipbetweenmaxtermMiandmintermmi,wehaveMi=（），Mi+mi=（）.6卡諾圖化簡：最小積之和：圈1最小和之積：圈0；F取非后圈1再取非。邏輯函數(shù)的化簡4.15(e)4.18(b)4.58(b)4.59(a)7Complementsum(完全和)：對于一個邏輯函數(shù)，下列哪個說法是不正確的（)。

a)最小和邏輯表達式肯定唯一

b)標準和邏輯表達式肯定唯一

c)標準積邏輯表達式肯定唯一

d)完全和邏輯表達式肯定唯一Thesumofalltheprimeimplicantsofalogicfunction.4.17(d)8組合電路的分析分析的目的：確定給定電路的邏輯功能分析步驟：由輸入到輸出逐級寫出邏輯函數(shù)表達式對輸出邏輯函數(shù)表達式進行化簡判斷邏輯功能（列真值表或畫波形圖）9例：下圖為一可控函數(shù)發(fā)生器，其中C1、C2為控制端，A、B為輸入變量，F(xiàn)為輸出變量。C1、C2的取值如表所示，完成此表。C1C2F=f(A,B)0001101110例：分析圖示邏輯電路的功能B3B2B1B0G3G2G1G0解：1、寫表達式2、列真值表3、分析功能0000000100100011010001010110011110001001101010111100110111101111B3B2B1B0G3G2G1G0000000010011G3=B3G2=B3B2G1=B2B1G0=B1B0二進制碼至GRAY碼的轉(zhuǎn)換電路0010011001110101010011001101111111101010101110011000GRAY碼至二進制碼的轉(zhuǎn)換?11組合電路的綜合問題描述邏輯抽象選定器件類型函數(shù)化簡電路處理將函數(shù)式變換電路實現(xiàn)真值表或函數(shù)式用門電路用MSI組合電路或PLD12X1X0X3X200

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1000011110Y2=X3X2+X3X1+X3X0+X2X1X0d11dd1d1dd1d1dd11d1dd1Homework:Designacodetransformationcircuitwhichcantransformexcess-3codeto2421code(fig.2-9).Itisrequiredthatthecircuithastheminimumcost.13X1X0X3X200

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+X3X1X0+X3’X1X0’

Homework:Designacodetransformationcircuitwhichcantransformexcess-3codeto2421code(fig.2-9).Itisrequiredthatthecircuithastheminimumcost.14例：設(shè)計用3個開關(guān)控制一個電燈的邏輯電路，要求改變?nèi)魏我粋€開關(guān)的狀態(tài)都能控制電燈由亮變滅或者由滅變亮。輸入：A、B、C，輸出：F（1-燈亮，0-燈滅）000001010011100101110111ABCF011010011、填寫真值表2、選擇器件

用基本門電路實現(xiàn)利用卡諾圖化簡用譯碼器實現(xiàn)轉(zhuǎn)換為最小項之和用數(shù)據(jù)選擇器實現(xiàn)154.61completethetimingdiagram16statichazards4.19(c)

Doesthereexistanyhazardineachcircuitcorrespondingtothefollowinglogicexpressions?Ifso,whatkindofhazardmayoccur,underwhatinputconditionthehazardwilloccur,andhowtoeliminatethehazard?

(a)F=AB+AC’+C’D(b)F=(A+B’)(A’+C’)

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0

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0F=(A+B’)(A’+C’)(B’+C’)F=(A+B’)(A’+C’):WhenB=C=1andAchanges,thecircuithasstatic-0hazard.

17第6章設(shè)計實踐常用的中規(guī)模集成電路（MSI）編碼器、譯碼器、多路復用器、奇偶校驗電路、

比較器、加法器、三態(tài)器件掌握基本功能，級聯(lián)的方法綜合應用：利用基本MSI器件作為基本單元設(shè)計更復雜的組合邏輯電路文檔標準和電路定時（了解）186.20(c)(g)(h)196.41designacustomizeddecoder利用MSI和SSI部件，設(shè)計專用譯碼器，其功能表如下表所示，在你的設(shè)計中要使IC組件的數(shù)目最少。

輸入：A2、A1、A0，使能信號CS_L輸出：8位2021………22input：8421BCDcodeoutput：1-out-of-10codeY0Y9I0I1I2I3多余的6個狀態(tài)如何處理？輸出均無效：拒絕“翻譯”作為任意項處理6.38

Supposethatyouareaskedtodesignanewcomponent,adecimaldecoderthatisoptimizedforapplicationsinwhichonlydecimalinputcombinationsareexpectedtooccur.Howcanthecostofsuchadecoderbeminimizedcomparedtoonethatissimplya4-to-16decoderwithsixoutputsremoved?Writethelogicequationsforalltenoutputsoftheminimizeddecoder,assumingactive-highinputsandoutputsandnoenableinputs.MinimalcostMinimalrisk23二-十進制譯碼器00000001001000110100010101100111100010011010101111001101111011111000000000010000000000100000000001000000

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1000011110Y91Y9=I3·I2’·I1’·I0ddddddY9=I3·I025A2A1A0GSEOEI74x148I7I0I0_LI7_LA2A1A0AVALID6.53Drawthelogicdiagramforacircuitthatresolvespriorityamongeightactive-lowinputs,I0_L–I7_L,whereI0_Lhasthehighestpriority.Thecircuitshouldproduceactive-highaddressoutputsA2–A0toindicatethenumberofthehighest-priorityassertedinput.Ifatleastoneinputisasserted,thenanAVALIDoutputshouldbeasserted.Besuretonameallsignalswiththeproperactivelevels.Thiscircuitcanbebuiltwithasingle74x148andnoothergates.26A3A2A1A0FA3A2A1A0F00001100000001010011001001010000111101100100