1 鐵電存儲(chǔ)器的技術(shù)背景  概述  目前的存儲(chǔ)器技術(shù)可以分為兩種。第一種是非易失性存儲(chǔ)器。傳統(tǒng)上來(lái)說(shuō)，他們被應(yīng)用于只讀存儲(chǔ)器因?yàn)樗麄兌加胁灰讓?xiě)入的特點(diǎn)。這些存儲(chǔ)器均源于只讀存儲(chǔ)器 (ROM)技術(shù) , 包括 EPROM, EEPROM, and Flash EPROM。  第二種是易失性存儲(chǔ)器。易失性存儲(chǔ)器包括 SRAM（靜態(tài)存儲(chǔ)器） 和 DRAM（動(dòng)態(tài)存儲(chǔ)器）。由于 RAM 類(lèi)型的存儲(chǔ)器易于 寫(xiě)入，因此它所保存的數(shù)據(jù)需要定時(shí)刷新。但由于用戶(hù)易于寫(xiě)入這種 RAM 存儲(chǔ)器 ，所以它是易失性。 可是它們同樣會(huì)在掉電的情況下會(huì)失去所保存的數(shù)據(jù)。  鐵 電存儲(chǔ)器或是 FRAM 是一種比較完善的非易失性存儲(chǔ)器。它是一種真正的非易失性存儲(chǔ)器。 FRAM 存儲(chǔ)器有 易于 寫(xiě)入和非易失性的優(yōu)點(diǎn)，因此它能在斷電情況下保存數(shù)據(jù)。 FRAM 產(chǎn)品可以保存數(shù)據(jù)達(dá)幾千年。這種存儲(chǔ)技術(shù)已經(jīng)成為存儲(chǔ)器的主流。這種存儲(chǔ)技術(shù)可以簡(jiǎn)單的解釋為對(duì)現(xiàn)在存儲(chǔ)技術(shù)的概述。  什么是鐵電存儲(chǔ)器  相對(duì)于其它類(lèi)型的半導(dǎo)體技術(shù)而言，鐵電存儲(chǔ)器具有一些獨(dú)一無(wú)二的特性。傳統(tǒng)的主流半導(dǎo)體存儲(chǔ)器可以分為兩類(lèi) -易失性 存儲(chǔ)器 和非易失性 存儲(chǔ)器 。易失性存儲(chǔ)器包括靜態(tài)存儲(chǔ)器 SRAM（ static random access memory)和動(dòng)態(tài)存儲(chǔ)器 DRAM （ dynamic random access memory)。  SRAM 和 DRAM 在掉電時(shí)均會(huì)失去保存的數(shù)據(jù)。  RAM 類(lèi)型的存儲(chǔ)器易于使用、性能好，可是它們同樣會(huì)在掉電的情況下會(huì)失去所保存的數(shù)據(jù)。   非易失性存儲(chǔ)器在掉電的情況下并不會(huì)丟失所存儲(chǔ)的數(shù)據(jù)。然而所有的主流的非易失性存儲(chǔ)器均源自于只讀存儲(chǔ)器（ ROM）技術(shù)。  正如你所猜想的一樣，被稱(chēng)為只讀存儲(chǔ)器的東西肯定不容易進(jìn)行寫(xiě)入操作，而事實(shí)上是根本不能寫(xiě)入。所有由ROM技術(shù)研發(fā)出的存儲(chǔ)器則都具有寫(xiě)入信息困難的特點(diǎn)。這些技術(shù)包括有 EPROM (幾乎已經(jīng) 停用 ）、 EEPROM 和 Flash。  這些存儲(chǔ)器不僅寫(xiě)入速度慢，而且只能有限次的擦寫(xiě)，寫(xiě)入時(shí)功耗大。   2 鐵電存儲(chǔ)器能兼容 RAM 的一切功能，并且和 ROM 技術(shù)一樣，是一種非易失性的存儲(chǔ)器。鐵電存儲(chǔ)器在這兩類(lèi)存儲(chǔ)類(lèi)型間搭起了一座跨越溝壑的橋梁 -一種非易失性的 RAM。   基于 RAM 隨機(jī)存儲(chǔ)器的 FRAM 是利用鐵電晶體的鐵電效應(yīng)實(shí)現(xiàn)數(shù)據(jù)存儲(chǔ)。這是與其他非易失性存儲(chǔ)器完全不同的機(jī)制，它是漂浮的門(mén)技術(shù)。鐵電效應(yīng)是鐵電晶體所固有的一種偏振極化特性，與電磁作用無(wú)關(guān)。  當(dāng)一個(gè)電場(chǎng)被加到鐵電晶體材料時(shí)，鐵電存儲(chǔ)器 中的原子產(chǎn)生于電容器的兩個(gè)電極板之間。這種電容器的構(gòu)成與動(dòng)態(tài)的隨機(jī)存儲(chǔ)器非常相似。不同的是存儲(chǔ)數(shù)據(jù)不需向動(dòng)態(tài)的隨機(jī)存儲(chǔ)器那樣需要進(jìn)行數(shù)據(jù)刷新，它是利用晶體機(jī)制進(jìn)行數(shù)據(jù)存儲(chǔ)的。這種晶體中心原子包含兩種穩(wěn)定狀態(tài)：“ 0”狀態(tài)和“ 1”狀態(tài)。  由于它的基于隨機(jī)存取儲(chǔ)存器而設(shè)計(jì)的，因此它的讀操作和寫(xiě)操作都很容易。但它和動(dòng)態(tài)的隨機(jī)存儲(chǔ)器又有所不同，數(shù)據(jù)的存儲(chǔ)狀態(tài)是穩(wěn)定的。因此，鐵電存儲(chǔ)器不需周期性刷新，即使在掉電的條件下， FRAM 仍能保存數(shù)據(jù)。  許多人都誤解鐵電這個(gè)名字 , 一個(gè)名字使用前綴 " ferro" 似乎暗示鐵或 磁性 。鐵電這個(gè)詞也容易讓人聯(lián)想到鐵磁。事實(shí)上，鐵電存儲(chǔ)器并沒(méi)有用到 鐵或磁性 的原理。他并沒(méi)有受到外部磁場(chǎng)的影響，因?yàn)樗瑐鹘y(tǒng)的動(dòng)態(tài)隨機(jī)存儲(chǔ)器一樣，操作使用的是電場(chǎng)。  鐵電存儲(chǔ)器的技術(shù)原理  當(dāng)一個(gè)電場(chǎng)被加到鐵電晶體時(shí)，中心原子順著電場(chǎng)的方向在晶體里移動(dòng)。  當(dāng)原子移動(dòng)時(shí)，它通過(guò)一個(gè)能量壁壘，從而引起電荷擊穿。內(nèi)部電路感應(yīng)到電荷擊穿并設(shè)置存儲(chǔ)器。移去電場(chǎng)后，中心原子保持不動(dòng)，存儲(chǔ)器的狀態(tài)也得以保存。鐵電存儲(chǔ)器不需要定時(shí)更新，掉電后數(shù)據(jù)能夠繼續(xù)保存，速度快而且不容易寫(xiě)壞。  鐵電存儲(chǔ)器技術(shù)和標(biāo)準(zhǔn)的 CMOS 制造工藝相兼容 。鐵電薄膜被放置于 CMOS 基層之上，并置于兩電極之間，使用金屬互連并鈍化后完成鐵電制造過(guò)程。   3 Ramtron 的鐵電存儲(chǔ)器技術(shù)到現(xiàn)在已經(jīng)相當(dāng)?shù)某墒臁Ｗ畛醯蔫F電存儲(chǔ)器采用兩晶體管 /兩電容器（ 2T/2C）的結(jié)構(gòu)，導(dǎo)致元件體積相對(duì)過(guò)大。最近隨著鐵電材料和制造工藝的發(fā)展，在鐵電存儲(chǔ)器的每一單元內(nèi)都不再需要配置標(biāo)準(zhǔn)電容器。  Ramtron 新的單晶體管 /單電容器結(jié)構(gòu)可以像 DRAM 一樣，使用單電容器為存儲(chǔ)器陣列的每一列提供參考。與現(xiàn)有的 2T/2C 結(jié)構(gòu)相比，它有效的把內(nèi)存單元所需要的面積減少一半。新的設(shè)計(jì)極大的提高了 鐵電存儲(chǔ)器的效率，降低了鐵電存儲(chǔ)器產(chǎn)品的生產(chǎn)成本。   4 Ramtron 同樣也通過(guò)轉(zhuǎn)向更小的技術(shù)節(jié)點(diǎn)來(lái)提高鐵電存儲(chǔ)器各單元的成本效率。最近采用的 0.35 微米的制造工藝相對(duì)于前一代 0.5 微米的制造工藝，極大的降低了芯片的功耗，提高了單個(gè)晶元的利用率 。  所有這些令人振奮的發(fā)展都使得鐵電存儲(chǔ)器在人們?nèi)粘Ｉ畹母鱾€(gè)領(lǐng)域被廣泛應(yīng)用。從辦公室復(fù)印機(jī)、高檔服務(wù)器到汽車(chē)安全氣囊和娛樂(lè)設(shè)施，鐵電存儲(chǔ)器不斷改進(jìn)性能在世界范圍內(nèi)得到廣泛的應(yīng)用。  鐵電存儲(chǔ)器的操作  一個(gè)簡(jiǎn)單的鐵電晶體模型如圖 1鐵電存儲(chǔ)器晶體的中心原子結(jié)構(gòu)所示。在鐵電晶 體中心有一個(gè)活動(dòng)原子。在電場(chǎng)的作用下， 晶陣中的中心原子會(huì)沿著電場(chǎng)方向運(yùn)動(dòng) 到另一邊 ， 反方方向的電場(chǎng)會(huì)使原子向著相反的方向運(yùn)動(dòng)。在晶體頂層和底層的原子保持穩(wěn)定狀態(tài)。當(dāng)電場(chǎng)從晶體移走或是掉電的情況下，中心原子會(huì)保持在原來(lái)的位置。作為存儲(chǔ)器件，鐵電存儲(chǔ)器是一種比較完善的存儲(chǔ)器件。它包含了兩種穩(wěn)定的狀態(tài)：一種是在無(wú)時(shí)間和能量的情況下不發(fā)生改變，另一種是在多變的外部環(huán)境下保持穩(wěn)定。  讀操作  雖然電容作為存儲(chǔ)器件，但他不想線(xiàn)性電荷一樣進(jìn)行數(shù)據(jù)存儲(chǔ)。要進(jìn)行讀操作，就要對(duì)存儲(chǔ)單元電容中鐵電晶體的中心原子位置進(jìn)行記錄。直接對(duì)中 心原子的位置進(jìn)行檢測(cè)是不能實(shí)現(xiàn)的。實(shí)際的讀操作過(guò)程如下。在存儲(chǔ)單元電容上施加一已知電 5 場(chǎng)（即對(duì)電容充電），如果原來(lái)晶體中心原子的位置與所施加的電場(chǎng)方向使中心原子要達(dá)到的位置相同，中心原子不會(huì)移動(dòng)；若相反，則中心原子將越過(guò)晶體中間層的高能階到達(dá)另一位置。在高能階的作用下，充電波形上就會(huì)出現(xiàn)一個(gè)尖峰，把這個(gè)充電波形同參考位的充電波形進(jìn)行比較，產(chǎn)生原子移動(dòng)的比沒(méi)有產(chǎn)生移動(dòng)的多了一個(gè)尖峰，非開(kāi)關(guān)電容產(chǎn)生普通的動(dòng)態(tài)隨機(jī)存儲(chǔ)器的電荷，而開(kāi)關(guān)電容則產(chǎn)生動(dòng)態(tài)隨機(jī)存儲(chǔ)器和鐵電存儲(chǔ)器的混合電荷。存儲(chǔ)電路決定了電容的切換。這種開(kāi)關(guān) 電荷允許由電路決定存儲(chǔ)電荷的狀態(tài)。晶體原子狀態(tài)的切換時(shí)間小于 1ns，完整的讀操作的時(shí)間小于 70ns。  因?yàn)樽x操作導(dǎo)致存儲(chǔ)單元狀態(tài)的改變，需要電路自動(dòng)恢復(fù)其內(nèi)容，所以每個(gè)讀操作后面還伴隨一個(gè)“預(yù)充”過(guò)程來(lái)對(duì)存儲(chǔ)器的狀態(tài)進(jìn)行恢復(fù)。雖然讀操作被破壞，但存儲(chǔ)無(wú)效的時(shí)間要低于 50ns。  寫(xiě)操作  寫(xiě)操作和讀操作十分類(lèi)似 。與其他的非易失性存儲(chǔ)技術(shù)不同，寫(xiě)操作非常簡(jiǎn)單無(wú)需系統(tǒng)延時(shí)。數(shù)據(jù)被寫(xiě)到鐵電的電容中。如果需要的話(huà)，新的數(shù)據(jù)很容易改變鐵電晶體的狀態(tài)。對(duì)于讀操作， 晶體原子狀態(tài)的切換時(shí)間小于 1ns，讀操作的時(shí)間小于 70ns。 對(duì)于讀操作，  “預(yù)充”操作伴隨在  寫(xiě)操作之后。  FRAM存儲(chǔ)單元結(jié)構(gòu)  目前的 FRAM產(chǎn)品使用 2個(gè)場(chǎng)效應(yīng)管和 2個(gè)電容（ 2T2C），每個(gè)存儲(chǔ)單元包括數(shù)據(jù)位和各自的參考位，自 1993年起這種基本的單元已經(jīng)被應(yīng)用于產(chǎn)品中。 2T2C存儲(chǔ)單          元提高了數(shù)據(jù)的可信度，特別是對(duì)于早期的 非易失性存儲(chǔ)器是非常重要的。 2T2C存儲(chǔ)單元結(jié)構(gòu)如圖 2所示。   6 圖 2  2T2C存儲(chǔ)單元結(jié)構(gòu)  2T2C存儲(chǔ)單元為每個(gè)數(shù)據(jù)位提供了一個(gè)相近的參考位，依照數(shù)據(jù)狀態(tài)進(jìn)行編程，讀操作時(shí)一個(gè)電容會(huì)發(fā)生改變，而其它不發(fā)生變化，在設(shè)計(jì)存儲(chǔ)器時(shí) 選擇“ 0”或“ 1”任意狀態(tài)。涉及到相應(yīng)的存儲(chǔ)器時(shí)， 存儲(chǔ)電路 能非常精確地測(cè)量那個(gè) 變化和非變 化 電容器之間 不同。  存儲(chǔ)隊(duì)列中電容的變化被藉由從每一點(diǎn)點(diǎn)有差別的信號(hào)中除去。  2001年“單管單容”（ 1T1C）技術(shù)被投放市場(chǎng)，它使得鐵電存儲(chǔ)器產(chǎn)品的價(jià)格被提高。簡(jiǎn)化的 1T1C存儲(chǔ)單元結(jié)構(gòu)框圖如圖 3所示。                  圖 3  1T1C存儲(chǔ)單元結(jié)構(gòu)框圖  FRAM 的發(fā)展  正如前文所提到的，自從  1993年起基于鐵電存儲(chǔ)器 FRAM產(chǎn)品已經(jīng)被廣泛的應(yīng)用于商業(yè)生產(chǎn)。在工業(yè)生產(chǎn)中，鐵電技術(shù)已經(jīng)趨于成熟。一些現(xiàn) 象已經(jīng)預(yù)示著下一種主流存儲(chǔ)技術(shù)的出現(xiàn)。  一方面， 很多的半導(dǎo)體供應(yīng)商正在發(fā)展鐵電。一些人關(guān)注近期產(chǎn)品的發(fā)展，而另一些人則關(guān)注已成熟的存儲(chǔ)器和產(chǎn)品的發(fā)展。  另一方面，目前生產(chǎn)的低密度的鐵電存儲(chǔ)器的產(chǎn)品有廣泛的市場(chǎng)。一些用戶(hù)已經(jīng)注意到鐵電存儲(chǔ)器的發(fā)展，鐵電存儲(chǔ)器的密度和結(jié)構(gòu)，以便于對(duì)鐵電產(chǎn)品的應(yīng)用。每個(gè)新的密度的一代使得產(chǎn)生一系列的用戶(hù)和廠(chǎng)家。   7 直到目前為止， Ramtron 公司是唯一的一家生產(chǎn)  FRAM 產(chǎn)品公司。由于公司的許可和授權(quán)，一些新的廠(chǎng)商也制造產(chǎn)品。在全球的范圍內(nèi)， FRAM發(fā)展適用于  FRAM 發(fā)展的 總資源正在劇烈的增長(zhǎng)。這正在引起  FRAM 技術(shù)進(jìn)步的里程碑。  下表是 Ramtron 公司和它的合伙人為 FRAM 技術(shù)的發(fā)展選擇了歷史的里程碑和近期的發(fā)展。  1984 Ramtron公司發(fā)現(xiàn)  FRAM 的發(fā)展技術(shù)  1989  FRAM第一次發(fā)展的過(guò)程  1993 首次制造容量為 4Kbit FRAM 存儲(chǔ)器的商業(yè)產(chǎn)品  1996 容量為 16Kbit FRAM 存儲(chǔ)器的制造  1998 廠(chǎng)家大量生產(chǎn)  0.1u的 FRAM 存儲(chǔ)器用于飛行產(chǎn)品   在 64Kb FRAM中首次加入 MCU w/ 1999 在工廠(chǎng)中大 量生產(chǎn)  0.5 u的 FRAM 存儲(chǔ)器   生產(chǎn) 64Kb, 256Kb FRAM 存儲(chǔ)器  2000 3V FRAM 產(chǎn)品的操作示范  2001 生產(chǎn) 256K 1T1C 的 FRAM 存儲(chǔ)器   在 FRAM生產(chǎn)過(guò)程中首次使用雙層金屬  生產(chǎn) 3V、 0.35u的產(chǎn)品  2002 256K 1T1C FRAM w/每周期  鐵電存儲(chǔ)器的應(yīng)用   儀表  電表、水表、儀器儀表、流量表、郵資表。   8 汽車(chē)   安全氣囊、車(chē)身控制系統(tǒng)、車(chē)載收音機(jī)、勻速控制、車(chē)載  DVD 、引擎、娛樂(lè)設(shè)備、儀器簇、  傳動(dòng)系、保險(xiǎn)裝置、遙感勘測(cè) /導(dǎo)航系 統(tǒng)、自動(dòng)收費(fèi)系統(tǒng)   通訊  移動(dòng)通訊發(fā)射站、  數(shù)據(jù)記錄儀  、電話(huà)、收音機(jī)、電信、可攜式 GPS 消費(fèi)性電子產(chǎn)品  家電、機(jī)頂盒、等離子液晶屏電視  計(jì)算機(jī)  辦公設(shè)備、雷達(dá)系統(tǒng)、  網(wǎng)絡(luò)附屬存儲(chǔ)  、電子式電腦切換器。  工業(yè)、科技、醫(yī)療  工業(yè)自動(dòng)控制、電梯、酒店門(mén)鎖、掌上操作儀器、醫(yī)療儀器、發(fā)動(dòng)機(jī)控制。  其他  自動(dòng)提款機(jī)、  照相機(jī)、游戲機(jī)、 POS 功能機(jī)（可以用來(lái)以電子方式購(gòu)買(mǎi)商品和服務(wù)）、  自動(dòng)售貨機(jī)。   鐵電存儲(chǔ)器在應(yīng)用中所起的作用  數(shù)據(jù)收集存儲(chǔ)   鐵電存儲(chǔ)器能夠允許系統(tǒng)設(shè)計(jì)師更快、更頻繁的寫(xiě)入數(shù)據(jù)，斷電不易丟失。對(duì)于使用 EEPROM 的用戶(hù)而言，這些是不能享受到的優(yōu)良性能。   數(shù)據(jù)收集包括數(shù)據(jù)獲取和存儲(chǔ)數(shù)據(jù)，而這些數(shù)據(jù)必須在掉電的情況下仍能保留（不是暫時(shí)性的或中間結(jié)果暫存）。這些就是具有基本收集數(shù)據(jù)功能的系統(tǒng)或者子系統(tǒng)，并會(huì)隨著時(shí)間而不斷的發(fā)展出新的功能。在絕大多數(shù)的情況下，這個(gè)改變的過(guò)程紀(jì)錄是很重要的。  配置信息存儲(chǔ)    9 鐵電存儲(chǔ)器能夠靈活實(shí)時(shí)的，并非在斷電的瞬間，存儲(chǔ)配置信息，從而幫助系統(tǒng)設(shè)計(jì)師克服由于突然掉電而造成的數(shù)據(jù)丟失。  配置信息的存儲(chǔ)能夠隨著時(shí)間來(lái)追蹤系統(tǒng)變化。其目標(biāo)是在接通電源后恢復(fù)信息在以前的狀態(tài)和位置 ，識(shí)別錯(cuò)誤發(fā)生的起因。總的來(lái)說(shuō)，數(shù)據(jù)收集通常是一個(gè)系統(tǒng)或者子系統(tǒng)的功能，然而配置信息存儲(chǔ)則是一個(gè)低級(jí)別的工程功能，與系統(tǒng)的類(lèi)別無(wú)關(guān)。  非易失性緩沖器   鐵電存儲(chǔ)器能夠在數(shù)據(jù)發(fā)送或存儲(chǔ)到其它非易失性媒介前，很快地存儲(chǔ)正在運(yùn)行中的數(shù)據(jù)。在這種情況下，數(shù)據(jù)信息由一個(gè)子系統(tǒng)傳輸?shù)搅硪粋€(gè)子系統(tǒng)。這個(gè)信息是十分重要的并且不允許在斷電的情況下丟失。在有些情況下 , 目標(biāo)系統(tǒng)是一個(gè)更大的存儲(chǔ)器。  而鐵電存儲(chǔ)器的快速、無(wú)限次的讀寫(xiě)特點(diǎn)使得數(shù)據(jù)在被發(fā)送到另一個(gè)系統(tǒng)前就能及時(shí)保存。  SRAM的替代和擴(kuò)展存儲(chǔ)器   鐵電存儲(chǔ)器的快速寫(xiě) 入和非易失性的特點(diǎn)可以通過(guò)系統(tǒng)設(shè)計(jì)師把 SRAM 和EEPROM 的特點(diǎn)合而為一或者能單純的擴(kuò)展 SRAM 的功能而實(shí)現(xiàn)。  在很多情況下，一個(gè)系統(tǒng)會(huì)用到各種不同類(lèi)型的存儲(chǔ)器。鐵電存儲(chǔ)器同時(shí)具有ROM、  RAM 以及  EEPROM 的功能 ,并能節(jié)約系統(tǒng)內(nèi)存和功耗。最常見(jiàn)的例子就是一個(gè)外部串行 EEPROM 的嵌入式的微控制器。鐵電存儲(chǔ)器能夠取代 EEPROM,同樣也能提供 SRAM 的微功能。    1 FRAM Technology Backgrounder Overview Established memory technologies are divided into two categories. First are nonvolatile memories. Traditionally, systems use them in read-only or read mostly applications since they are difficult to write. These memories are derivatives of ROM technology that include EPROM, EEPROM, and Flash EPROM. Second are volatile memories. These are RAM devices including SRAM and DRAM. Since they are easy to write, RAMs often store data that must change often. While users can write RAMs easily, they are volatile； therefore storing quantities of data in the absence of power continues to be an engineering challenge. Ferroelectric Random Access Memory or FRAM has attributes that make it the ideal nonvolatile memory. It is a true nonvolatile RAM. FRAM memory write advantages and nonvolatility make it quite suitable for storing data in the absence of power. FRAM based products have been available for several years in limited quantities. The technology is now moving rapidly toward its emergence as a mainstream memory selection. This technology note provides a brief explanation of its operation as well as an overview of the technology development status. What is FRAM? FRAM offers a unique set of features relative to other semiconductor technologies. Traditional mainstream semiconductor memories can be divided into two primary categories - volatile and nonvolatile. Volatile memories include SRAM (static random access memory) and DRAM (dynamic random access memory). SRAMs and DRAMs lose their contents after power is removed from the electronic system. RAM type devices are very easy to use, and are high performing, but they share the annoying quirk of losing their mind when the lights go out.  Nonvolatile memories do not lose their contents when power is removed. However all of the mainstream nonvolatile memories share a common ancestry that derives from ROM (read only memory) technology. As you might guess, something called read only memory is not easy to write, in fact it's impossible. All of its descendants make it very difficult to write new information into them. They include technologies called EPROM (almost obsolete now), EEPROM, and Flash. ROM based technologies are very slow to write, wear out after being written a small number of times, and use a large amount of power to write. FRAM offers features consistent with a RAM technology, but is nonvolatile like a ROM technology. FRAM bridges the gap between the two categories and creates something completely new - a nonvolatile RAM. FRAM is a RAM-based device that uses the ferroelectric effect for a storage mechanism. This is a completely different mechanism than the one used by other nonvolatile memories,  2 which use floating gate technology. The ferroelectric effect is the ability of a material to store an electric polarization in the absence of an applied electric field. Depositing a film of ferroelectric material in crystalline form between two electrode plates to form a capacitor creates a FRAM memory cell. This capacitor construction is very similar to that of a DRAM capacitor. Rather than storing data as charge on a capacitor like a DRAM, a ferroelectric memory stores data within a crystalline structure. These  Perovskite crystals maintain two stable states a  1 and a 0. Figure 1. Perovskite Ferroelectric Crystal Due to its basic RAM design, the circuit reads and writes simply and easily. However unlike a DRAM,the data state is stable. Therefore the FRAM memory needs no periodic refresh and when power fails, the FRAM retains its data. People commonly misunderstand the name ferroelectric. To many, a name using the prefix  “ferro” seems to imply iron or magnetism. The word ferroelectric also is confused with ferromagnetic. In reality, ferroelectric memories use no iron or magnetic principles. They are not susceptible to external magnetic fields as they operate entirely using electric fields just as conventional DRAMs. FRAM Technology Basics When an electric field is applied to a ferroelectric crystal, the central atom moves in the direction of the field.  As the atom moves within the crystal, it passes through an energy barrier, causing a charge spike. Internal circuits sense the charge spike and set the memory. If the electric field is  3 removed from the crystal, the central atom stays in position, preserving the state of the memory. Therefore, the FRAM memory needs no periodic refresh and when power fails, FRAM memory retains its data. It's fast, and doesn't wear out! FRAM memory technology is compatible with industry standard CMOS manufacturing processes. The ferroelectric thin film is placed over CMOS base layers and sandwiched between two electrodes. Metal interconnect and passivation complete the process. Ramtron's FRAM memory technology has matured significantly since its inception. Initial FRAM memory architectures required a two-transistor/two-capacitor (2T/2C) memory architecture, which resulted in relatively large cell sizes. Recent advances in ferroelectric materials and processing have eliminated the need for an internal reference capacitor within every cell in the ferroelectric memory array. Ramtron's new one-transistor/one-capacitor cell architecture operates like a DRAM using a single capacitor as a common reference for each column in the memory array,  4 effectively cutting the required cell area in half compared to existing 2T/2C architectures. The new architecture significantly improves the die leverage and reduces manufacturing costs for resulting FRAM memory products. Ramtron has also migrated to smaller technology nodes to increase the cost effectiveness of FRAM memory cells. A recent move to a 0.35-micron manufacturing process reduces the operating power and increases the die leverage per wafer compared to earlier generations of Ramtrons FRAM products built on the companys existing 0.5-micron manufacturing line. All of these exciting developments in FRAM memory technology are finding their way into a host of applications that people use everyday. From office copiers and high-end servers to automotive airbags and entertainment systems, FRAM memory is improving an array of products and applications worldwide. FRAM Operation A simplified model of a ferroelectric crystal is shown in Figure 1. A ferroelectric crystal has a mobile atom in the center of the crystal. Applying an electric field across a face of the crystal causes this atom to move in the direction of the field. Reversing the field causes the atom to move in the opposite direction. Atom positions at the top and bottom of the crystal are stable. Therefore removing the electric field leaves the atom in a stable position, even in the absence of power. As a memory element, the ferroelectric crystal creates an ideal digital memory. It contains two stable data states, it requires very little time and energy to change states, and is very stable over a variety of environmental conditions. Read Operation Although the memory element is a capacitor, it does not store data as linear charge. In order to read a FRAM memory cell, it is necessary to detect the position of the atoms within the Perovskite crystals. Unfortunately, they cannot be directly sensed. The FRAM read process works as follows. An electric field is applied across the capacitor. The mobile atoms will move across the crystals in the direction of the field if they are not already in the appropriate positions. In the middle of the crystal, a high-energy state holds the atoms in place when no field is present. As the atoms move through this high-energy state, a charge spike is emitted. The circuit dumps charge resulting from the applied field from the capacitor and compares it to the charge from a reference. A capacitor with atoms that switch states will emit a larger charge than a capacitor with atoms that do not switch. The no switching capacitor will emit the ordinary DRAM charge while the switching capacitor will emit the combination of the DRAM and ferroelectric charges. The memory circuit must determine which capacitor switched. This switched charge allows the circuit to determine the state of a memory cell. The state switch occurs in under 1 ns, with the complete circuit access taking less than 70 ns. Since a memory read operation involves a change of state, the circuit automatically restores the memory state. Therefore each read access is accompanied by a precharge  5 operation that restores the memory state. Although the read is destructive, the time during which the memory cell is invalid is under 50 ns. Write Operation A write-operation is very similar to a read operation. Unlike other nonvolatile memory technologies, a write-operation is very simple and requires no system overhead. The circuit applies write data to the ferroelectric capacitors. If necessary, the new data simply switches the state of the ferroelectric crystals. As with a read, the change of state occurs in under 1 ns with a full access taking under 70 ns. As with a read, a precharge operation follows a write access. FRAM Memory Architectures Current FRAM products use a two-transistor, two capacitor memory (2T2C) cell. This cell, which provides each data bit with its own reference, is a well-proven scheme. The fundamental cell design has been in field use in products since 1993. The 2T2C memory cell provides robust data retention reliability, which is especially important during the early proving stages for a new nonvolatile memory. An example of the 2T2C cell is sho wn in Figure 2.   The 2T2C memory cell provides an individual reference in close proximity for each data bit. Depending on the programmed data state, one capacitor will switch when read while the other will not switch. The assignment of 1 and 0 states is arbitrary during the memory design. Given the close proximity, the memory circuit can measure the charge difference between the switching and non-switching capacitors very precisely.  Variations in the capacitors across the memory array are eliminated from consideration by having a differential signal for each bit.  The 1T1C technology entered the market in 2001, it significantly improves the cost-per-bit ratio of resulting FRAM memory products. resulting FRAM memory products. A simplified  6 diagram of the 1T1C cell is shown below in Figure 3. FRAM Development As mentioned earlier, FRAM-based products have been commercially available since 1993. The considerable feature advantages of FRAM technology have stirred interest within the industry. Several signposts point to its emergence as the next mainstream memory technology. On the supply side, numerous semiconductor suppliers are developing ferroelectric processes. A few concentrate on near-term production while others are eyeing the longer-term opportunity for more sophisticated memories and embedded products. On the demand side, a broad market has developed for low-density FRAM products that are currently in production. Many potential users are watching the FRAM roadmap, looking for FRAM densities and configurations that will be suitable for their applications. Each new density generation enables a range of new potential users and applications. Until recently, Ramtron was the only company producing FRAM products. As a result of its successful licensing program, several new vendors are in the process of establishing production capability. The total resources being applied to FRAM development on a global basis are increasing dramatically. This is causing acceleration in the advancement of FRAM technology and its process milestones. The following table shows selected historical milestones and the near-term roadmap for FRAM technology development by Ramtron and its partners.   1984 Ramtron founded to develop FRAM technology 1989  First FRAM fab installed for process development 1993 First FRAM commercial product introduced 4Kbit FRAM memory in volume production 1996 16Kbit FRAM memory in volume production 1998 foundries open pilot-production lines First MCU w/ embedded 64Kb FRAM prototype 1999   64Kb, 256Kb FRAM memories in production 2000 3V operation FRAM products demonstrated 2001 256K 1T1C FRAM in production First embedded product using two-layer metal  7 FRAM process in production 3V operation products enter production  2002 256K 1T1C FRAM w/Real Time Clock FRAM Product Applications Metering electric power water gas flow tax postage Automotive airbag body control car radio cruise control DVD engine entertainment instrument clusters power train safety telematics/navigation toll tag  Communications cell base stations data logger phones radio telecom portable GPS Consumer Electronics home automation set top plasma and LCD TV Computing office equipment RAID network attached storage KVM switch Industrial, Scientific and Medical industrial automation elevator hotel lock handheld instrument medical motor cont